Subject: Re: PCI subsystem on BigEndian.
To: Charles M. Hannum <>
From: Andrew Cagney <>
List: tech-ports
Date: 04/26/1996 14:39:55
Excerpts from mail: 25-Apr-96 Re: PCI subsystem on BigEnd.. Charles M.
Hannum@mit.ed (560)

> Chris G Demetriou <Chris_G_Demetriou@UX2.SP.CS.CMU.EDU> writes:
> > Certainly, if you put them into big-endian mode, you may have to code
> > more in the drivers...  Also, for PCI in particular, you run into
> > interesting cases when the devices are behind bridges...

You can run into interesting cases when the device is on the primary PCI
bus :-)

> You seem to be making the awfully large leap of faith that nobody will
> ever procude a PCI device which `wants' to speak big-endian natively. I
> don't buy that, especially with PowerPC boxes starting to use PCI.

I don't think so. After all who would buy one?

Remember also that the PCI spec defines its bus as being little endian
and CHRP mandates that the PHB (PCI host bridge) in combination with PCI
devices provide a little endian I/O programming model (regardless of
whether the machine was booted LE or BE).

Consequently such a device has no market and no advantages.