Subject: Re: PCI subsystem on BigEndian.
To: Dale Rahn <drahn@pacific.urbana.mcd.mot.com>
From: Andrew Cagney <cagney@highland.com.au>
List: tech-ports
Date: 04/24/1996 10:37:26
Excerpts from mail: 23-Apr-96 Re: PCI subsystem on BigEnd.. Chris G
Demetriou@UX2.SP (1440)

> > So far in the ncr driver I have identified several places
> > that require byte swapping: the scripts, word writes to
> > memory that the ncr chip reads. Scripts that are written on the fly...

> Don't the SIOP chips have an endianness setting?  all (1 8-) of the
> 53c8xx boards i've seen has an endianness jumper, though it's not
> clear that it would be a good idea to actually _use_ it...

They do; it is not.  Dale's approach is correct.

				Andrew :-)