Subject: Re: PCI subsystem on BigEndian.
To: Dale Rahn <firstname.lastname@example.org>
From: Chris G Demetriou <Chris_G_Demetriou@UX2.SP.CS.CMU.EDU>
Date: 04/23/1996 13:03:17
> Has anyone attempted to get the PCI subsystem, the ncr driver
> and the if_de driver working on a BigEndian system.
> I am in the midst of porting to a new platform and these
> drivers would be great if they could be unsed in a non LE system.
> So far in the ncr driver I have identified several places
> that require byte swapping: the scripts, word writes to
> memory that the ncr chip reads. Scripts that are written on the fly...
Don't the SIOP chips have an endianness setting? all (1 8-) of the
53c8xx boards i've seen has an endianness jumper, though it's not
clear that it would be a good idea to actually _use_ it...
A couple of people have suggested to me that there is some need for
'native to bus' and 'bus to native' endianness conversion macros...
This could very well be a good use for them.
There's also the minor detail that, in many people's opinion, the
current 53c8xx driver should be thown out wholesale. however, last i
heard, nobody had made real progress on a replacement.
As you appear to already understand, writes done with bus_mem and
bus_io macros are 'safe' -- it's assumed that the code which
implements them will do the right thing, in terms of making sure the
values are written to the bus in the appropriate way.
Given that, i don't think it should be too hard to make the 'de'
driver work on a big-endian PCI system.
If you run into problems, i'd be glad to help you out with them.