dje@watson.ibm.com said:
> Descriptor transfgers are not affected by the setting of BSWP.  Note
> that the byte ordering of the PCI bus is defined to be little Endian.
> BSWP should not be set to 1 when the controller is used in a PCI bus
> application. 

Hmm - the AMD docs are rather confusing here. The PCI bus
is little-endian - OK. This means that the registers on the
PCI bus are interpreteted little-endian, but tells nothing about
data DMA'd to main memory. Other chips are better in this respect.

OK, so we have to swap the descriptors. Unfortunately, we can't
do this with compile-time resolved #ifdefs because this would
break in cases where the hardware does the byteswapping.
(My ILACC obviously gets this right - it might be related to
the ACON and BACON bits which seem to be present in the ILACC
but not in the PCI chips.)
The buffer register access at runtime is done through function
pointers anyway, so the common am79900 code has to be fixed
in the initialisation function only. (Hope I'm not missing
something...)
The PCI frontend could then get byte swapping descriptor
read/write functions for BE machines.

So - do you want to do it?

best regards
Matthias