timecounters

[Emmanuel Dreyfus <manu%netbsd.org@localhost>]

Hello

The NetBSD kernel can use multiple timecounters for time keeping, the
choices available are shown by sysctl kern.timecounter.choice, and
the chosen timecounter is decided by kern.timecounter.hardware.

It seems the alternatives, their pros and cons, are not documented.
Did I miss it? All I found is PHK's paper referenced from timecounter(9),
which documents TSC, i8254 and ACPI. I think it would be nice to add
a few words about the available timecounters.

x86 TSC: cycle count from CPU register. Very quick to read, but unreliable if 
CPU frequency changes because of power saving. Also each CPU has its own
value (how do we cope with that?)

x86 i8254: Plain old Intel clock chip, slow but reliable and needs locking
to read.

ACPI-Fast, ACPI-Safe: Needs multiple read to get a good value. 
I have to read more of the paper to understand why. Also the
difference between ACPI-Fast and ACPI-Safe is not yet clear to me.

dummy: not documented. sys/kern/kern_tc.c says it is a fake timecounter
for bootstrap, before a real one is used. .

clockinterrupt: not documented at all?  See sys/kern/kern_clock.c

lapic: not quite documented in lapic(4)

xen_system_time, Hyper-V, Hyper-V-TSC: clocks provided by a hypervisor

Then we have the specialized clock chips:

ichlpcib: loosely documented in ichlpcib(4)

hpet: documented in hpet(4)

Ans that is only the beginning. grep tc_name sys/kern/arch sys/dev yields
a lot of results. For instance, arm has  bcm2835_tmr, clpssoc, a9tmr, gtmr, dc21285_fclk, gpt, digctl, mvsoctmr, dmtimer, saost_count, MCT, hstimer, Timer 2, LOSC, timer2, timer3, tmr1_count

Does it make sense to document all of theat?
-- 
Emmanuel Dreyfus
manu%netbsd.org@localhost