Re: Expected behavior when returning from a SIGFPE handler

[Mouse <mouse%Rodents-Montreal.ORG@localhost>]

> But the x86_64 code appears to return to the same instruction, banging its h$

> It's my belief that the alpha behavior is more desirable.

> Please, discuss.

I could argue that either way.

In some cases, you want to re-execute the instruction.  A simple
example is "FPU disabled" on architectures that have such a notion, eg
for lazy FPU switching.

In some cases, you don't want to.  An example might be soft-float, or
partial soft-float (such as, emulation of cases the hardware doesn't
handle).

On architectures like SPARC or, I think - you'd know better than I -
Alpha, where there are very few possible instruction sizes, sometimes
as few as just one, advancing past the instruction in the trap handler
is easy even if you have to do it in software.  On others, like the
VAX, it's a right pain to do in software.  On the latter sort, ideally,
the hardware would give you both the PC to use to re-execute the
instruction and the PC to use to skip the instruction, letting the trap
handler choose, but I'm not aware of any architecture that does that.
(The closest I'm aware of is, ironically, the SPARC, on which advancing
past an instruction in software is about as simple as it gets - but it
has both PC and next-PC in hardware, though admittedly for other
reasons.)

I see no clear single right answer here.

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