Re: pci_mapreg_map and BAR from `Bus space tutorial'

[Rocky Hotas <rockyhotas%firemail.cc@localhost>]

Hello Martin,
sorry for the delay and thanks a lot for your answer.

On giu 02  7:03, Martin Husemann wrote:
 
> > - FAA_MMREG_BAR may contain the beginning address of a space to be
> >   mapped. But how does `pci_mapreg_map' know the extension of such a map?
> 
> It is just an offset (like a register number), the BAR contains all info
> needed (or should, if setup has worked correctly).

Oh, ok, so the BAR does not specify just an address: it also specifies
the extension of the memory space. I could not guess this.

> If you remove your driver you can list the details from userland with
> pcictl(8).
[...]
> Usually firmware (or early bootloaders) configure the BARs properly, but
> sometimes they don't, and then NetBSD needs to run fixup code (which is
> a kernel option and not included in most kernels). The output
> of pcictl would help here.

Ok! With or without the driver, the output of pcictl(8) is the same and
I attach it to this message. The device we are talking about is in bus
pci0, dev 12, fun 0, so I ran from a root prompt `pcictl pci0 dump -d 12'.

> Give this is mips I assume PCI_MAPREG_TYPE_MEM is correct, but for a new
> device you may be unsure, and sometimes variants of devices exist that
> either make the type IO or MEM. You can query that in your driver with
> pci_mapreg_info() - but for the concrete case the userland pcictl output is
> easier.

Consider that this is a custom PCI device, created by the author of the
tutorial as statement in the sourcecode of gxemul which defines the
`cobalt' machine.
The tutorial used PCI_MAPREG_TYPE_MEM. Looking into the output of pcictl(8),
also `I/O space accesses: on' is on, but I don't know if it is significant.

Bye!

Rocky

PCI configuration registers:
  Common header:
    0x00: 0x0001fabc 0x00000003 0x0b400001 0x00000000

    Vendor ID: 0xfabc
    Device ID: 0x0001
    Command register: 0x0003
      I/O space accesses: on
      Memory space accesses: on
      Bus mastering: off
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0000
      Immediate Readiness: off
      Interrupt status: inactive
      Capability List support: off
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: fast (0x0)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: processor (0x0b)
    Subclass Name: Co-processor (0x40)
    Interface: 0x00
    Revision ID: 0x01
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x00
    Cache Line Size: 0bytes (0x00)

  Type 0 ("normal" device) header:
    0x10: 0x10110000 0x00000000 0x00000000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x00000000
    0x30: 0x00000000 0x00000000 0x00000000 0x00000000

    Base address register at 0x10
      type: 32-bit nonprefetchable memory
      base: 0x10110000
    Base address register at 0x14
      not implemented
    Base address register at 0x18
      not implemented
    Base address register at 0x1c
      not implemented
    Base address register at 0x20
      not implemented
    Base address register at 0x24
      not implemented
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x0000
    Subsystem ID: 0x0000
    Expansion ROM Base Address Register: 0x00000000
      base: 0x00000000
      Expansion ROM Enable: off
      Validation Status: Validation not supported
      Validation Details: 0x0
    Reserved @ 0x34: 0x00000000
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x00 (none)
    Interrupt line: 0x00

  Device-dependent header:
    0x40: 0x00000000 0x00000000 0x00000000 0x00000000
    0x50: 0x00000000 0x00000000 0x00000000 0x00000000
    0x60: 0x00000000 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000000 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x00000000 0x00000000