Le 29/01/2017 à 14:40, Mindaugas Rasiukevicius a écrit :
Maxime Villard <max%m00nbsd.net@localhost> wrote:... This patch fixes the two aforementioned issues: the VAs are allocated proportionally to the number of CPUs attached so we don't uselessly lose memory, and there is no false sharing since the cpu_info structures are already cache-line-aligned (and so is their content). I just wanted to know if someone had suggestions or whatever before I commit it.Certainly a good change to make.Maxime [1] http://m00nbsd.net/garbage/vpage/vpage.diffIn pmap_vpage_cpualloc(): + vabase = uvm_km_alloc(kernel_map, vrange, vrange, + UVM_KMF_VAONLY); Why alignment is set to vrange?
"... and there is no false sharing since the cpu_info structures are already cache-line-aligned (and so is their content)." This part is actually wrong. We want the ptes to be aligned, not their pointers. The only way to have a cache-line-aligned pte is by having a vrange-aligned va. (CACHE_LINE_SIZE / sizeof(pt_entry_t)) gives the number of ptes that can fit a cache line; multiplied by PAGE_SIZE it gives the va range taken by these ptes. So the allocation is vrange-sized and vrange-aligned, in order to occupy exactly one cache line per cpu. (note: I still would like to verify that it reduces false sharing, but my cpu does not support PMCs at all apparently...)