Re: kernel panic on ibm4xx-based powerpc box with DDB

[Rin Okuyama <rokuyama%rk.phys.keio.ac.jp@localhost>]

On 2016/12/28 16:01, Matt Thomas wrote:
> > On Dec 27, 2016, at 10:49 PM, Rin Okuyama <rokuyama%rk.phys.keio.ac.jp@localhost> wrote:
> >
> > Thank you very much for your reply. I revised the patch accordingly, and
> > it passed some stress tests on my OPENBLOCKS266.
> >
> > However, sorry for bothering you, but I don't understand why this work.
> > The original DDB/IPKDB handlers use ddbstk/ipkdbstk, that clearly do not
> > support nested traps, as you pointed out. The patched version uses
> > CI_{DDB,IPKDB}SAVE, that are save areas in cpu_info. It seems to me that
> > they also do not support nested traps; a succeeding trap overwrites
> > save areas already used by a preceding trap, doesn't it? I'm a beginner
> > of assembler programming, and maybe I misunderstand something...
>
> Much nicer.  It does support nested traps because %r1 (sp) isn't loaded if we are already in kernel mode.  So the trapframe is just saved further down the stack.
>
> You can't get an exception while saving into the saveareas so that part doesn't need to stack.  Only after the saveareas are moved into a trapframe will exceptions be reenabled.  That's what PSL_RI enables.

Thank you for your kind explanation. I'm starting to understand.
I will read again the reference manual from this point of view.
So, could I commit the patch?

Rin