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Re: mutex(9) on sparc64 RMO

   Date: Tue, 25 Nov 2014 16:40:30 +0000 (UTC)
   From: Eduardo Horvath <>

   On Mon, 24 Nov 2014, Taylor R Campbell wrote:

   > What exactly is the consistency you need before accessing the lock?

   I know you need a `membar #Lookaside' before accessing the atomic 
   variable.  I don't recall if other memory barriers are needed since it's 
   been a while since I last looked at the V9 architecture reference.


If I understand `membar #Lookaside' correctly, the only CPU it should
affect is the one that issued a store, and it causes the CPU to

(a) force the store to physical memory, and then
(b) issue a load request to physical memory,

rather than reading the value in the store buffer.

That matters for memory-mapped I/O registers, but I can't imagine how
it matters for a mutex in RAM.  I may be missing something, though:
all I know about SPARC is what the v9 manual tells me.

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