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Re: icache sync private rump component
Matt Thomas wrote:
> On Jul 19, 2014, at 2:02 AM, Alexander Nasonov <alnsn%yandex.ru@localhost>
> > To compile <mips/cache.h> in rump kernel, I needed to add -DMIPS3=1
> > to Makefile.rump for mips platforms. This is the only change outside
> > of sljit scope.
> the cache instructions are privileged. There's a sysarch interface
> that you can use the clean the cache.
That's exactly what rumpcomp_sync_icache() hypercall does. I need this
definition to compile cache.c stub.
To draw an analogy, my hack is similar to this hack, except that I
define one baseline cpu while they define all cpus:
#if defined(_MODULAR) || defined(_LKM) || defined(_STANDALONE)
/* Assume all CPU architectures are valid for LKM's and standlone progs */
#define MIPS1 1
#define MIPS3 1
#define MIPS4 1
#define MIPS32 1
#define MIPS32R2 1
#define MIPS64 1
#define MIPS64R2 1
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