Re: icache sync private rump component

[Alexander Nasonov <alnsn%yandex.ru@localhost>]

Justin Cormack wrote:
> On Jul 19, 2014 10:01 AM, "Alexander Nasonov" <alnsn%yandex.ru@localhost> 
> wrote:
> >
> > To compile <mips/cache.h> in rump kernel, I needed to add -DMIPS3=1
> > to Makefile.rump for mips platforms. This is the only change outside
> > of sljit scope.
> 
> You surely can't do that, people may be trying to compile on non mips3
> hardware?

Some mips have different ILP models in userspace and in the kernel.
This means that rump test doesn't necessarily test the code in the
kernel. I came up with the following:

In sys/rump/Makefile.rump:

# Define baseline cpu for mips ports, required for
# rumpcomp_sync_icache() hypercall.
.if !empty(MACHINE_ARCH:Mmips*)
.if !empty(MACHINE_ARCH:Mmips64*)
CPPFLAGS+=      -DMIPS64=1
.else
CPPFLAGS+=      -DMIPS1=1
.endif
.endif

In sys/arch/mips/include/sljitarch.h:

#ifdef _LP64
#define SLJIT_CONFIG_MIPS_64 1
#else
#define SLJIT_CONFIG_MIPS_32 1
#endif

Alex