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Re: [Milkymist port] virtual memory management

On 2013-05-29 21:17, Rhialto wrote:
On Wed 29 May 2013 at 19:51:15 +0200, Yann Sionneau wrote:
1°) some code somewhere generates an I(nstruction) TLB miss in the
MMU, this leads to a CPU exception, CPU then branches immediately to
the "ITLB miss" exception vector.

(Side issue I've been wondering about: Why does almost everybody these
days call their Address Translation Cache now Translation Lookaside
Buffer?  Why prefer vague IBM terminology over a clear Motorola term?)

And why either, when the VAX already had a TLB back in the 70s, where TLB actually stood for TransLation Buffer. Why did someone feel the need to add a "lookaside", which is rather bogus. And I think Motorola came last to the table... :-)


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