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Re: Panic at init on arm (Seagate Dockstar) with -current

On Sat, Oct 20, 2012 at 2:54 PM, Andy Ruhl <> wrote:
> On Sat, Oct 20, 2012 at 11:46 AM, matthew green <> 
> wrote:
>> what is the bt here?  can you try a kernel with
>> LOCKDEBUG option?  this looks more like a usb
>> issue than an arm issue.

I added some other stuff with LOCKDEBUG and the bt changed:

## Transferring control to NetBSD stage-2 loader (at address 00008000) ...

NetBSD/evbarm (sheevaplug) booting ...
initarm: Configuring system ...
arm32_bootmem_init: kernelend=0x49b000
arm32_bootmem_init: adding 31589 free pages: [0x49b000..0x7ffffff] (VA
  arm32_bootmem_init: adding 8 free pages: [0..0x7fff] (VA 0xc0000000)
arm32_kernel_vm_init: 2 L2 pages are needed to map 0x4c3000 kernel bytes
arm32_kernel_vm_init: allocating page tables for vectoradd_pages:
adding pv 0xc0478090 (pa 0x49b000, va 0xc049b000, 1 pages) at tail
 kerneladd_pages: appending pv 0xc04874f0 (0x49c000..0x49ffff) to
add_pages: appending pv 0xc0478214 (0x4a0000..0x4a0fff) to 0x49b000..0x49ffff
add_pages: appending pv 0xc0478228 (0x4a1000..0x4a1fff) to 0x49b000..0x4a0fff
 vmadd_pages: appending pv 0xc047823c (0x4a2000..0x4a2fff) to 0x49b000..0x4a1fff
add_pages: appending pv 0xc0478250 (0x4a3000..0x4a3fff) to 0x49b000..0x4a2fff
add_pages: appending pv 0xc0478264 (0x4a4000..0x4a4fff) to 0x49b000..0x4a3fff
add_pages: appending pv 0xc0478278 (0x4a5000..0x4a5fff) to 0x49b000..0x4a4fff
add_pages: appending pv 0xc047828c (0x4a6000..0x4a6fff) to 0x49b000..0x4a5fff
add_pages: appending pv 0xc04782a0 (0x4a7000..0x4a7fff) to 0x49b000..0x4a6fff
add_pages: appending pv 0xc04782b4 (0x4a8000..0x4a8fff) to 0x49b000..0x4a7fff
add_pages: appending pv 0xc04782c8 (0x4a9000..0x4a9fff) to 0x49b000..0x4a8fff
add_pages: adding pv 0xc047807c (pa 0x4aa000, va 0xc04aa000, 1 pages) at tail
add_pages: appending pv 0xc04783ac (0x4ab000..0x4abfff) to 0x4aa000..0x4aafff
add_pages: appending pv 0xc04783c0 (0x4ac000..0x4acfff) to 0x4aa000..0x4abfff
add_pages: appending pv 0xc04783d4 (0x4ad000..0x4adfff) to 0x4aa000..0x4acfff
add_pages: appending pv 0xc0478370 (0x4ae000..0x4affff) to 0x4aa000..0x4adfff
add_pages: appending pv 0xc0478384 (0x4b0000..0x4b1fff) to 0x4aa000..0x4affff
add_pages: appending pv 0xc0478100 (0x4b2000..0x4b2fff) to 0x4aa000..0x4b1fff
Creating L1 page table at 0x0049c000
arm32_kernel_vm_init: adding L2 pt (VA 0xc049b000, PA 0x49b000) for VA 0
 (vectors)arm32_kernel_vm_init: adding L2 pt (VA 0xc04a0000, PA
0x4a0000) for VA 0xc0000000 (kernel)
arm32_kernel_vm_init: adding L2 pt (VA 0xc04a1000, PA 0x4a1000) for VA
0xc0400000 (kernel)
arm32_kernel_vm_init: adding L2 pt (VA 0xc04a2000, PA 0x4a2000) for VA
0xc2000000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0xc04a3000, PA 0x4a3000) for VA
0xc2400000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0xc04a4000, PA 0x4a4000) for VA
0xc2800000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0xc04a5000, PA 0x4a5000) for VA
0xc2c00000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0xc04a6000, PA 0x4a6000) for VA
0xc3000000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0xc04a7000, PA 0x4a7000) for VA
0xc3400000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0xc04a8000, PA 0x4a8000) for VA
0xc3800000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0xc04a9000, PA 0x4a9000) for VA
0xc3c00000 (vm)
Mapping kernel
arm32_kernel_vm_init: adding chunk for kernel text 0x8000..0x385fff
(VA 0xc0008000)
   add_pages: adding pv 0xc0478068 (pa 0x8000, va 0xc0008000, 894
pages) before pa 0x49b000
arm32_kernel_vm_init: adding chunk for kernel data/bss
0x386000..0x49afff (VA 0xc0386000)
add_pages: appending pv 0xc04780d8 (0x386000..0x49afff) to 0x8000..0x385fff
Listing Chunks
arm32_kernel_vm_init: pv 0xc0478068: chunk VA 0xc0008000..0xc049afff
(PA 0x8000, prot 3, cache 1)
arm32_kernel_vm_init: pv 0xc0478090: chunk VA 0xc049b000..0xc04a9fff
(PA 0x49b000, prot 3, cache 2)
arm32_kernel_vm_init: pv 0xc047807c: chunk VA 0xc04aa000..0xc04b2fff
(PA 0x4aa000, prot 3, cache 1)

Mapping Chunks
arm32_kernel_vm_init: mapping chunk VA 0xc0008000..0xc049afff (PA
0x8000, prot 3, cache 1)
pmap_map_chunk: pa=0x8000 va=0xc0008000 size=0x493000 resid=0x493000
prot=0x3 cache=1
arm32_kernel_vm_init: mapping chunk VA 0xc049b000..0xc04a9fff (PA
0x49b000, prot 3, cache 2)
pmap_map_chunk: pa=0x49b000 va=0xc049b000 size=0xf000 resid=0xf000
prot=0x3 cache=2
arm32_kernel_vm_init: mapping last chunk VA 0xc04aa000..0xc04b2fff (PA
0x4aa000, prot 3, cache 1)
pmap_map_chunk: pa=0x4aa000 va=0xc04aa000 size=0x9000 resid=0x9000
prot=0x3 cache=1
devmap: f1000000 -> f10fffff @ f1000000
pmap_map_chunk: pa=0xf1000000 va=0xf1000000 size=0x100000
resid=0x100000 prot=0x3 cache=0

                             Physical              Virtual        Num
                       Starting    Ending    Starting    Ending   Pages
               SDRAM: 0x00000000 0x07ffffff 0xc0000000 0xc7ffffff 32768
        text section: 0x00008000 0x00385fff 0xc0008000 0xc0385fff 894
        data section: 0x00390000 0x00477980 0xc0390000 0xc0477980 232
         bss section: 0x00477980 0x0049ad1c 0xc0477980 0xc049ad1c 36
   L1 page directory: 0x0049c000 0x0049ffff 0xc049c000 0xc049ffff 4
   ABT stack (CPU 0): 0x004aa000 0x004aafff 0xc04aa000 0xc04aafff 1
   FIQ stack (CPU 0): 0x004ab000 0x004abfff 0xc04ab000 0xc04abfff 1
   IRQ stack (CPU 0): 0x004ac000 0x004acfff 0xc04ac000 0xc04acfff 1
   UND stack (CPU 0): 0x004ad000 0x004adfff 0xc04ad000 0xc04adfff 1
  IDLE stack (CPU 0): 0x004ae000 0x004affff 0xc04ae000 0xc04affff 2
           SVC stack: 0x004b0000 0x004b1fff 0xc04b0000 0xc04b1fff 2
      Message Buffer: 0x004b2000 0x004b2fff 0xc04b2000 0xc04b2fff 1
   Exception Vectors: 0x004b3000 0x004b3fff 0x00000000 0x00000fff 1
         Free Memory: 0x004b4000 0x07ffffff                       31564
         Free Memory: 0x00000000 0x00007fff                       8
switching to new L1 page table @0x49c000...TTBR0=0x49c000 OK
nfreeblocks = 2, free_pages = 31572 (0x7b54)
bootstrap done.
init subsystems: stacks vectors undefined page pmap_physload pmap [
Kernel symbol table missing! ]
Loaded initial symtab at 0xc03b9370, strtab at 0xc03f1aec, # entries 14373
pmap_postinit: Allocated 35 static L1 descriptor tables
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007, 2008, 2009, 2010, 2011, 2012
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 6.99.14 (DOCKSTAR.OCT20_2012-2) #1: Sat Oct 20 15:01:52 MST 2012
total memory = 128 MB
avail memory = 120 MB
cprng kernel: WARNING insufficient entropy at creation.
mainbus0 (root)
cpu0 at mainbus0 core 0: Sheeva 88SV131 rev 1 (ARM9E-S core)
cpu0: DC enabled IC enabled WB enabled EABT branch prediction enabled
cpu0: 16KB/32B 4-way L1 Instruction cache
cpu0: 16KB/32B 4-way write-back-locking-C L1 Data cache
mvsoc0 at mainbus0: Marvell 88F6281 Rev. A0  Kirkwood
mvsoc0: CPU Clock 1200.000 MHz  SysClock 400.000 MHz  TClock 200.000 MHz
mvsoctmr0 at mvsoc0 unit 0 offset 0x20300-0x203ff: Marvell SoC Timer
mvsocgpp at mvsoc0 unit 0 not configured
mvsocrtc0 at mvsoc0 unit 0 offset 0x10300-0x10317: Marvell SoC Real Time Clock
com0 at mvsoc0 unit 0 offset 0x12000-0x1201f irq 33: ns16550a, working fifo
com0: console
com1 at mvsoc0 unit 1 offset 0x12100-0x1211f irq 34: ns16550a, working fifo
ehci0 at mvsoc0 unit 0 offset 0x50000-0x51fff irq 19: Marvell USB 2.0 Interface
usb0 at ehci0: USB revision 2.0
gtidmac0 at mvsoc0 unit 0 offset 0x60000-0x60fff: Marvell IDMA
Controller/XOR Engine
gtidmac0: XOR Engine 4 channels, intr 5...8
gttwsi0 at mvsoc0 unit 0 offset 0x11000-0x110ff irq 29: Marvell TWSI controller
iic0 at gttwsi0: I2C bus
mvcesa0 at mvsoc0 unit 0 offset 0x30000-0x3ffff irq 22: Marvell
Cryptographic Engines and Security Accelerator
mvgbec0 at mvsoc0 unit 0 offset 0x70000-0x73fff: Marvell Gigabit
Ethernet Controller
mvgbe0 at mvgbec0 port 0 irq 11
mvgbe0: Ethernet address 00:10:75:1a:5e:fe
makphy0 at mvgbe0 phy 0: Marvell 88E1116R Gigabit PHY, rev. 0
makphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT,
1000baseT-FDX, auto
mvgbec1 at mvsoc0 unit 1 offset 0x74000-0x77fff: Marvell Gigabit
Ethernet Controller
mvgbe at mvgbec1 port 0 not configured
mvpex at mvsoc0 unit 0 not configured
mvsata at mvsoc0 unit 0 not configured
mvsdio at mvsoc0 unit 0 not configured
uhub0 at usb0: Marvell EHCI root hub, class 9/0, rev 2.00/1.00, addr 1
Fatal kernel mode prefetch abort at 0xfffffb44
trapframe: 0xc8a2bbf0, spsr=60000073
r0 =00000000, r1 =00000000, r2 =c8a32f3f, r3 =600000d3
r4 =c8a32f40, r5 =00000020, r6 =00b1cf40, r7 =c04787f4
r8 =00000000, r9 =c2347b0c, r10=00000012, r11=c8a2bc6c
r12=00000000, ssp=c8a2bc44, slr=00114004, pc =fffffb44

Stopped in pid 0.5 (system) at  fffffb44:       address 0xfffffb44 is invalid
andeq   r0, r0, r10, lsr r0
db> bt
        scp=0xc03930d0 rlv=0x00000006 (6)
        rsp=0xc0486474 rfp=0x00000000

Hope this helps. Should I open a PR?


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