tech-kern archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

4.x -> 5.x locking?



I've got some questions about locking.

I've got some kernel code to move from 4.x to 5.x.  Looking at it, I
can see it effectively assumes the kernel is giantlocked: it assumes
that at most one CPU is executing in the kernel.  (This particular code
never runs in device interrupt context, though it may get called from
callouts and the like.)  I seem to recall being told, when I asked more
or less this question on the lists some time back, that this was a safe
assumption under 4.x - and, indeed the thing seems to work on 4.x.

Thus, my first question: is this also true of 5.x?

I found mutex(9), condvar(9), and the like.  But it is not clear to me
what I need to do to be MP-ready.  Do I need to use the stuff from
mb(9), or membar_ops(3), or what?  It's not clear from the manpages
whether, for example, membar_enter is usable within the kernel; the
reference from mutex(9) seems to imply so, but I've been surprised
before.  It's also not clear whether it would even work; I see no
statements promising that if I, for example, do

        mutex_enter(mtx);
        ...update a data structure...
        membar_sync();
        mutex_exit(mtx);

that the updates will necessarily be visible to another processor which
later takes the same mutex; membar_sync() is specified to synchronize
memory accesses with respect to other memory accesses, not necessarily
with respect to (for example) mutex operations, and it's not clear
whether the "other memory accesses" includes accesses by other
processors.  I could have the other processor do a membar_enter() after
taking the mutex, but, again, it's not clear whether the accesses the
manpage talks about refer to "this CPU" or "any CPU".  ("Any CPU" is
more useful here (and probably mroe expensive), but "this CPU" is what
I'd expect from what I've read of memory barriers in CPU documentation.)

The mb(9) page specifically warns that it does not entail any promises
about pushing stores to visibility by other processors, so I don't
think it's useful here - am I wrong?

And, finally, with reference to the membar_ops(3) page, what does it
mean for a load to "reach global visibility"?

/~\ The ASCII                             Mouse
\ / Ribbon Campaign
 X  Against HTML                mouse%rodents-montreal.org@localhost
/ \ Email!           7D C8 61 52 5D E7 2D 39  4E F1 31 3E E8 B3 27 4B


Home | Main Index | Thread Index | Old Index