Re: Is there a way to obtain a machine's cache line size?

[Steven Bellovin <smb%cs.columbia.edu@localhost>]

On Jan 20, 2011, at 3:00 37PM, Paul Koning wrote:

> 
> On Jan 20, 2011, at 2:47 PM, der Mouse wrote:
> 
>>> I see there is a compile time constant CACHE_LINE_SIZE in
>>> <sys/param.h> which currently seems to be always be set to 64, but
>>> I'm pretty certain that is not necessarily a correct value.
>> 
>> You are correct; to cite the one example I currently have swapped into
>> my brain, the Super-H used in the Dreamcast has 32-byte cache lines
>> (true of the I-cache and D-cache both).
> 
> I'm curious why non-kernel components would care.
> 
> The question also gets amusing when the cache line size varies among the 
> caches.  That's not all that common, but it certainly happens.
> 
Performance.  Going back a long time -- about 40 years -- on a machine
with no cache but with 16-way interleaved memory, we discovered that it
could multiply 257x257 matrices faster than 256x256, because of contention
for the memory controller.  The same sort of thing could happen with caches.
> 


                --Steve Bellovin, http://www.cs.columbia.edu/~smb