Re: bus_dmamap_sync() for USB

[Manuel Bouyer <bouyer%antioche.eu.org@localhost>]

On Tue, Jun 24, 2008 at 01:13:12PM -0500, David Young wrote:
> On Tue, Jun 24, 2008 at 03:24:46PM +0200, Manuel Bouyer wrote:
> > On Tue, Jun 24, 2008 at 08:49:41AM -0400, Michael Lorenz wrote:
> > > This sounds like a good explanation of what I'm seeing.
> > > I'll try your latest patch later today - you said you fixed another  
> > > race condition(s).
> > > This leaves the question why the ohci/ehci board just works in much  
> > > faster machines ( namely an 800MHz G4 and a dual 450MHz US-II ) - I'd  
> > > expect them to be more sensitive to race conditions like that. On the  
> > > other hand, they might just be fast enough for the CPU to (almost)  
> > > always win the race.
> > 
> > This is one explaination. Interrupt latency may also play a role; I had
> > much more troubles under Xen than with native amd64. 
> 
> What do you think the role of interrupt latency is?

The linked-list corruption is purely timing-related: the host has to 
read/change it while the controller is reading/modifying it for it to happen.
The controller looks at the linked list every microsecond (in other words,
it's active every microsecond) If the interrupt handler runs fast enough
(and is not heavily loaded, i.e. not talking to several devices/endpoints at
once) it's likely to complete before the controller is active again.

-- 
Manuel Bouyer <bouyer%antioche.eu.org@localhost>
     NetBSD: 26 ans d'experience feront toujours la difference
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