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Re: Re: Support for Intel 82965PM in netbsd-4



On Fri, Mar 07 2008 - 08:57, Nick Hudson wrote:
> On Thursday 06 March 2008 19:55:42 Joel CARNAT wrote:
> > Hi,
> >
> > I've updated my source tree during the day, then applied the patch.
> > Unfortunately, it fails.
> > Find attached the make log and the faulty C file.
> 
> It didn't patch properly from some reason. Did you have any local changes? Is 
> there a .rej file?

Yes, I tried myself to backport the driver from what's was on cvsweb.
And I couldn't find what was wrong from two .c files.

The thing is I ran "cvs up" before applying your patch and thought it
would wipe out my modifications.

Anyway, I grabed a full clean source tree, applyed your patch and it
works great :-) Find the dmesg and Xorg.0.log attached in case wanted.

Thank a lot.
Cheers,
        Jo

> 
> As I botched the pcidevs stuff I've put a new diff
> 
>       ftp://ftp.netbsd.org/pub/NetBSD/misc/skrll/i965/i965-2.diff
> 
> I suggest you clean your tree and apply the new diff.
> 
> Cheers,
> Nick

> /*    $NetBSD: agp_i810.c,v 1.35 2006/11/16 01:33:08 christos Exp $   */
> 
> /*-
>  * Copyright (c) 2000 Doug Rabson
>  * Copyright (c) 2000 Ruslan Ermilov
>  * All rights reserved.
>  *
>  * Redistribution and use in source and binary forms, with or without
>  * modification, are permitted provided that the following conditions
>  * are met:
>  * 1. Redistributions of source code must retain the above copyright
>  *    notice, this list of conditions and the following disclaimer.
>  * 2. Redistributions in binary form must reproduce the above copyright
>  *    notice, this list of conditions and the following disclaimer in the
>  *    documentation and/or other materials provided with the distribution.
>  *
>  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
>  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
>  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
>  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
>  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
>  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
>  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
>  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
>  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
>  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
>  * SUCH DAMAGE.
>  *
>  *    $FreeBSD: src/sys/pci/agp_i810.c,v 1.4 2001/07/05 21:28:47 jhb Exp $
>  */
> 
> #include <sys/cdefs.h>
> __KERNEL_RCSID(0, "$NetBSD: agp_i810.c,v 1.35 2006/11/16 01:33:08 christos 
> Exp $");
> 
> #include <sys/param.h>
> #include <sys/systm.h>
> #include <sys/malloc.h>
> #include <sys/kernel.h>
> #include <sys/lock.h>
> #include <sys/proc.h>
> #include <sys/device.h>
> #include <sys/conf.h>
> 
> #include <uvm/uvm_extern.h>
> 
> #include <dev/pci/pcivar.h>
> #include <dev/pci/pcireg.h>
> #include <dev/pci/pcidevs.h>
> #include <dev/pci/agpvar.h>
> #include <dev/pci/agpreg.h>
> 
> #include <sys/agpio.h>
> 
> #include <machine/bus.h>
> 
> #include "agp_intel.h"
> 
> #define READ1(off)    bus_space_read_1(isc->bst, isc->bsh, off)
> #define READ4(off)    bus_space_read_4(isc->bst, isc->bsh, off)
> #define WRITE4(off,v) bus_space_write_4(isc->bst, isc->bsh, off, v)
> #define WRITEGTT(off, v)                                              \
>       do {                                                            \
>               if (isc->chiptype == CHIP_I915) {                       \
>                       bus_space_write_4(isc->gtt_bst, isc->gtt_bsh,   \
>                           (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4,   \
>                           (v));                                       \
>               } else if (isc->chiptype == CHIP_I965) {                \
>                       WRITE4(AGP_I965_GTT +                           \
>                           (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4,   \
>                           (v));                                       \
>               } else {                                                \
>                       WRITE4(AGP_I810_GTT +                           \
>                           (u_int32_t)((off) >> AGP_PAGE_SHIFT) * 4,   \
>                           (v));                                       \
>               }                                                       \
>       } while (0)
> 
> #define CHIP_I810 0   /* i810/i815 */
> #define CHIP_I830 1   /* 830M/845G */
> #define CHIP_I855 2   /* 852GM/855GM/865G */
> #define CHIP_I915 3   /* 915G/915GM/945G/945GM */
> #define CHIP_I965 4   /* 965Q */
> 
> struct agp_i810_softc {
>       u_int32_t initial_aperture;     /* aperture size at startup */
>       struct agp_gatt *gatt;
>       int chiptype;                   /* i810-like or i830 */
>       u_int32_t dcache_size;          /* i810 only */
>       u_int32_t stolen;               /* number of i830/845 gtt entries
>                                          for stolen memory */
>       bus_space_tag_t bst;            /* register bus_space tag */
>       bus_space_handle_t bsh;         /* register bus_space handle */
>       bus_space_tag_t gtt_bst;        /* GTT bus_space tag */
>       bus_space_handle_t gtt_bsh;     /* GTT bus_space handle */
>       struct pci_attach_args vga_pa;
> 
>       void *sc_powerhook;
>       struct pci_conf_state sc_pciconf;
> };
> 
> static u_int32_t agp_i810_get_aperture(struct agp_softc *);
> static int agp_i810_set_aperture(struct agp_softc *, u_int32_t);
> static int agp_i810_bind_page(struct agp_softc *, off_t, bus_addr_t);
> static int agp_i810_unbind_page(struct agp_softc *, off_t);
> static void agp_i810_flush_tlb(struct agp_softc *);
> static int agp_i810_enable(struct agp_softc *, u_int32_t mode);
> static struct agp_memory *agp_i810_alloc_memory(struct agp_softc *, int,
>                                               vsize_t);
> static int agp_i810_free_memory(struct agp_softc *, struct agp_memory *);
> static int agp_i810_bind_memory(struct agp_softc *, struct agp_memory *, 
> off_t);
> static int agp_i810_unbind_memory(struct agp_softc *, struct agp_memory *);
> static void agp_i810_powerhook(int, void *);
> 
> static struct agp_methods agp_i810_methods = {
>       agp_i810_get_aperture,
>       agp_i810_set_aperture,
>       agp_i810_bind_page,
>       agp_i810_unbind_page,
>       agp_i810_flush_tlb,
>       agp_i810_enable,
>       agp_i810_alloc_memory,
>       agp_i810_free_memory,
>       agp_i810_bind_memory,
>       agp_i810_unbind_memory,
> };
> 
> /* XXXthorpej -- duplicated code (see arch/i386/pci/pchb.c) */
> static int
> agp_i810_vgamatch(struct pci_attach_args *pa)
> {
> 
>       if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY ||
>           PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
>               return (0);
> 
>       switch (PCI_PRODUCT(pa->pa_id)) {
>       case PCI_PRODUCT_INTEL_82810_GC:
>       case PCI_PRODUCT_INTEL_82810_DC100_GC:
>       case PCI_PRODUCT_INTEL_82810E_GC:
>       case PCI_PRODUCT_INTEL_82815_FULL_GRAPH:
>       case PCI_PRODUCT_INTEL_82830MP_IV:
>       case PCI_PRODUCT_INTEL_82845G_IGD:
>       case PCI_PRODUCT_INTEL_82855GM_IGD:
>       case PCI_PRODUCT_INTEL_82865_IGD:
>       case PCI_PRODUCT_INTEL_82915G_IGD:
>       case PCI_PRODUCT_INTEL_82915GM_IGD:
>       case PCI_PRODUCT_INTEL_82945P_IGD:
>       case PCI_PRODUCT_INTEL_82945GM_IGD:
>       case PCI_PRODUCT_INTEL_82945GM_IGD_1:
>       case PCI_PRODUCT_INTEL_82965Q_IGD:
>       case PCI_PRODUCT_INTEL_82965Q_IGD_1:
>       case PCI_PRODUCT_INTEL_82965G_IGD:
>       case PCI_PRODUCT_INTEL_82965G_IGD_1:
>       case PCI_PRODUCT_INTEL_82965PM_IGD:
>       case PCI_PRODUCT_INTEL_82965PM_IGD_1:
>               return (1);
>       }
> 
>       return (0);
> }
> 
> static int
> agp_i965_map_aperture(struct pci_attach_args *pa, struct agp_softc *sc, int 
> reg)
> {
>         /*
>          * Find the aperture. Don't map it (yet), this would
>          * eat KVA.
>          */
>         if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
>             PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT, &sc->as_apaddr, 
> &sc->as_apsize,
>             &sc->as_apflags) != 0)
>                 return ENXIO;
> 
>         sc->as_apt = pa->pa_memt;
>  
>         return 0;
> }
>  
> int
> agp_i810_attach(struct device *parent, struct device *self, void *aux)
> {
>       struct agp_softc *sc = (void *)self;
>       struct agp_i810_softc *isc;
>       struct agp_gatt *gatt;
>       int error, apbase;
>       bus_size_t mmadrsize;
> 
>       isc = malloc(sizeof *isc, M_AGP, M_NOWAIT|M_ZERO);
>       if (isc == NULL) {
>               aprint_error(": can't allocate chipset-specific softc\n");
>               return ENOMEM;
>       }
>       sc->as_chipc = isc;
>       sc->as_methods = &agp_i810_methods;
> 
>       if (pci_find_device(&isc->vga_pa, agp_i810_vgamatch) == 0) {
> #if NAGP_INTEL > 0
>               const struct pci_attach_args *pa = aux;
> 
>               switch (PCI_PRODUCT(pa->pa_id)) {
>               case PCI_PRODUCT_INTEL_82840_HB:
>               case PCI_PRODUCT_INTEL_82865_HB:
>               case PCI_PRODUCT_INTEL_82845G_DRAM:
>               case PCI_PRODUCT_INTEL_82815_FULL_HUB:
>                       return agp_intel_attach(parent, self, aux);
>               }
> #endif
>               aprint_error(": can't find internal VGA device config space\n");
>               free(isc, M_AGP);
>               return ENOENT;
>       }
> 
>       /* XXXfvdl */
>       sc->as_dmat = isc->vga_pa.pa_dmat;
> 
>       switch (PCI_PRODUCT(isc->vga_pa.pa_id)) {
>       case PCI_PRODUCT_INTEL_82810_GC:
>       case PCI_PRODUCT_INTEL_82810_DC100_GC:
>       case PCI_PRODUCT_INTEL_82810E_GC:
>       case PCI_PRODUCT_INTEL_82815_FULL_GRAPH:
>               isc->chiptype = CHIP_I810;
>               break;
>       case PCI_PRODUCT_INTEL_82830MP_IV:
>       case PCI_PRODUCT_INTEL_82845G_IGD:
>               isc->chiptype = CHIP_I830;
>               break;
>       case PCI_PRODUCT_INTEL_82855GM_IGD:
>       case PCI_PRODUCT_INTEL_82865_IGD:
>               isc->chiptype = CHIP_I855;
>               break;
>       case PCI_PRODUCT_INTEL_82915G_IGD:
>       case PCI_PRODUCT_INTEL_82915GM_IGD:
>       case PCI_PRODUCT_INTEL_82945P_IGD:
>       case PCI_PRODUCT_INTEL_82945GM_IGD:
>       case PCI_PRODUCT_INTEL_82945GM_IGD_1:
>               isc->chiptype = CHIP_I915;
>               break;
>       case PCI_PRODUCT_INTEL_82965Q_IGD:
>       case PCI_PRODUCT_INTEL_82965Q_IGD_1:
>       case PCI_PRODUCT_INTEL_82965PM_IGD:
>       case PCI_PRODUCT_INTEL_82965PM_IGD_1:
>       case PCI_PRODUCT_INTEL_82965G_IGD:
>       case PCI_PRODUCT_INTEL_82965G_IGD_1:
>               isc->chiptype = CHIP_I965;
>               break;
>       }
> 
>       apbase = isc->chiptype == CHIP_I915 ? AGP_I915_GMADR : AGP_I810_GMADR;
>       if (isc->chiptype == CHIP_I965) {
>               error = agp_i965_map_aperture(&isc->vga_pa, sc, AGP_I965_GMADR);
>       } else {
>               error = agp_map_aperture(&isc->vga_pa, sc, apbase);
>       }
>       if (error != 0) {
>               aprint_error(": can't map aperture\n");
>               free(isc, M_AGP);
>               return error;
>       }
> 
>       if (isc->chiptype == CHIP_I915) {
>               error = pci_mapreg_map(&isc->vga_pa, AGP_I915_MMADR,
>                   PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh,
>                   NULL, &mmadrsize);
>               if (error != 0) {
>                       aprint_error(": can't map mmadr registers\n");
>                       agp_generic_detach(sc);
>                       return error;
>               }
>               error = pci_mapreg_map(&isc->vga_pa, AGP_I915_GTTADR,
>                   PCI_MAPREG_TYPE_MEM, 0, &isc->gtt_bst, &isc->gtt_bsh,
>                   NULL, NULL);
>               if (error != 0) {
>                       aprint_error(": can't map gttadr registers\n");
>                       /* XXX we should release mmadr here */
>                       agp_generic_detach(sc);
>                       return error;
>               }
>       } else if (isc->chiptype == CHIP_I965) {
>               error = pci_mapreg_map(&isc->vga_pa, AGP_I965_MMADR,
>                   PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh,
>                   NULL, &mmadrsize);
>               if (error != 0) {
>                       aprint_error(": can't map mmadr registers\n");
>                       agp_generic_detach(sc);
>                       return error;
>               }
>       } else {
>               error = pci_mapreg_map(&isc->vga_pa, AGP_I810_MMADR,
>                   PCI_MAPREG_TYPE_MEM, 0, &isc->bst, &isc->bsh,
>                   NULL, &mmadrsize);
>               if (error != 0) {
>                       aprint_error(": can't map mmadr registers\n");
>                       agp_generic_detach(sc);
>                       return error;
>               }
>       }
> 
>       isc->initial_aperture = AGP_GET_APERTURE(sc);
> 
>       gatt = malloc(sizeof(struct agp_gatt), M_AGP, M_NOWAIT);
>       if (!gatt) {
>               agp_generic_detach(sc);
>               return ENOMEM;
>       }
>       isc->gatt = gatt;
> 
>       gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT;
> 
>       if (isc->chiptype == CHIP_I810) {
>               caddr_t virtual;
>               int dummyseg;
> 
>               /* Some i810s have on-chip memory called dcache */
>               if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
>                       isc->dcache_size = 4 * 1024 * 1024;
>               else
>                       isc->dcache_size = 0;
> 
>               /* According to the specs the gatt on the i810 must be 64k */
>               if (agp_alloc_dmamem(sc->as_dmat, 64 * 1024,
>                   0, &gatt->ag_dmamap, &virtual, &gatt->ag_physical,
>                   &gatt->ag_dmaseg, 1, &dummyseg) != 0) {
>                       free(gatt, M_AGP);
>                       agp_generic_detach(sc);
>                       return ENOMEM;
>               }
>               gatt->ag_virtual = (uint32_t *)virtual;
> 
>               gatt->ag_size = gatt->ag_entries * sizeof(u_int32_t);
>               memset(gatt->ag_virtual, 0, gatt->ag_size);
> 
>               agp_flush_cache();
>               /* Install the GATT. */
>               WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1);
>       } else if (isc->chiptype == CHIP_I830) {
>               /* The i830 automatically initializes the 128k gatt on boot. */
>               pcireg_t reg;
>               u_int32_t pgtblctl;
>               u_int16_t gcc1;
> 
>               reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
>               gcc1 = (u_int16_t)(reg >> 16);
>               switch (gcc1 & AGP_I830_GCC1_GMS) {
>               case AGP_I830_GCC1_GMS_STOLEN_512:
>                       isc->stolen = (512 - 132) * 1024 / 4096;
>                       break;
>               case AGP_I830_GCC1_GMS_STOLEN_1024:
>                       isc->stolen = (1024 - 132) * 1024 / 4096;
>                       break;
>               case AGP_I830_GCC1_GMS_STOLEN_8192:
>                       isc->stolen = (8192 - 132) * 1024 / 4096;
>                       break;
>               default:
>                       isc->stolen = 0;
>                       aprint_error(
>                           ": unknown memory configuration, disabling\n");
>                       agp_generic_detach(sc);
>                       return EINVAL;
>               }
>               if (isc->stolen > 0) {
>                       aprint_error(": detected %dk stolen memory\n%s",
>                           isc->stolen * 4, sc->as_dev.dv_xname);
>               }
> 
>               /* GATT address is already in there, make sure it's enabled */
>               pgtblctl = READ4(AGP_I810_PGTBL_CTL);
>               pgtblctl |= 1;
>               WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
> 
>               gatt->ag_physical = pgtblctl & ~1;
>       } else if (isc->chiptype == CHIP_I855 || isc->chiptype == CHIP_I915 ||
>                  isc->chiptype == CHIP_I965) {
>               pcireg_t reg;
>               u_int32_t pgtblctl, stolen;
>               u_int16_t gcc1;
> 
>               /* Stolen memory is set up at the beginning of the aperture by
>                  * the BIOS, consisting of the GATT followed by 4kb for the
>                * BIOS display.
>                  */
>               switch (isc->chiptype) {
>               case CHIP_I855:
>                       stolen = 128 + 4;
>                       break;
>               case CHIP_I915:
>                       stolen = 256 + 4;
>                       break;
>               case CHIP_I965:
>                       stolen = 512 + 4;
>                       break;
>               default:
>                       aprint_error(": bad chiptype\n");
>                       agp_generic_detach(sc);
>                       return EINVAL;
>               }
> 
>               reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I855_GCC1);
>               gcc1 = (u_int16_t)(reg >> 16);
>               switch (gcc1 & AGP_I855_GCC1_GMS) {
>               case AGP_I855_GCC1_GMS_STOLEN_1M:
>                       isc->stolen = (1024 - stolen) * 1024 / 4096;
>                       break;
>               case AGP_I855_GCC1_GMS_STOLEN_4M:
>                       isc->stolen = (4096 - stolen) * 1024 / 4096;
>                       break;
>               case AGP_I855_GCC1_GMS_STOLEN_8M:
>                       isc->stolen = (8192 - stolen) * 1024 / 4096;
>                       break;
>               case AGP_I855_GCC1_GMS_STOLEN_16M:
>                       isc->stolen = (16384 - stolen) * 1024 / 4096;
>                       break;
>               case AGP_I855_GCC1_GMS_STOLEN_32M:
>                       isc->stolen = (32768 - stolen) * 1024 / 4096;
>                       break;
>               case AGP_I915_GCC1_GMS_STOLEN_48M:
>                       isc->stolen = (49152 - stolen) * 1024 / 4096;
>                       break;
>               case AGP_I915_GCC1_GMS_STOLEN_64M:
>                       isc->stolen = (65536 - stolen) * 1024 / 4096;
>                       break;
>               default:
>                       isc->stolen = 0;
>                       aprint_error(
>                           ": unknown memory configuration, disabling\n");
>                       agp_generic_detach(sc);
>                       return EINVAL;
>               }
>               if (isc->stolen > 0) {
>                       aprint_error(": detected %dk stolen memory\n%s",
>                           isc->stolen * 4, sc->as_dev.dv_xname);
>               }
> 
>               /* GATT address is already in there, make sure it's enabled */
>               pgtblctl = READ4(AGP_I810_PGTBL_CTL);
>               pgtblctl |= 1;
>               WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
> 
>               gatt->ag_physical = pgtblctl & ~1;
>       }
> 
>       /*
>        * Make sure the chipset can see everything.
>        */
>       agp_flush_cache();
> 
>       isc->sc_powerhook = powerhook_establish(sc->as_dev.dv_xname,
>           agp_i810_powerhook, sc);
>       if (isc->sc_powerhook == NULL)
>               printf("%s: WARNING: unable to establish PCI power hook\n",
>                   sc->as_dev.dv_xname);
> 
>       return 0;
> }
> 
> #if 0
> static int
> agp_i810_detach(struct agp_softc *sc)
> {
>       int error;
>       struct agp_i810_softc *isc = sc->as_chipc;
> 
>       error = agp_generic_detach(sc);
>       if (error)
>               return error;
> 
>       /* Clear the GATT base. */
>       if (sc->chiptype == CHIP_I810) {
>               WRITE4(AGP_I810_PGTBL_CTL, 0);
>       } else {
>               unsigned int pgtblctl;
>               pgtblctl = READ4(AGP_I810_PGTBL_CTL);
>               pgtblctl &= ~1;
>               WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
>       }
> 
>       /* Put the aperture back the way it started. */
>       AGP_SET_APERTURE(sc, isc->initial_aperture);
> 
>       if (sc->chiptype == CHIP_I810) {
>               agp_free_dmamem(sc->as_dmat, gatt->ag_size, gatt->ag_dmamap,
>                   (caddr_t)gatt->ag_virtual, &gatt->ag_dmaseg, 1);
>       }
>       free(sc->gatt, M_AGP);
> 
>       return 0;
> }
> #endif
> 
> static u_int32_t
> agp_i810_get_aperture(struct agp_softc *sc)
> {
>       struct agp_i810_softc *isc = sc->as_chipc;
>       pcireg_t reg;
>       u_int16_t miscc, gcc1, msac;
> 
>       switch (isc->chiptype) {
>       case CHIP_I810:
>               reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM);
>               miscc = (u_int16_t)(reg >> 16);
>               if ((miscc & AGP_I810_MISCC_WINSIZE) ==
>                   AGP_I810_MISCC_WINSIZE_32)
>                       return 32 * 1024 * 1024;
>               else
>                       return 64 * 1024 * 1024;
>       case CHIP_I830:
>               reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
>               gcc1 = (u_int16_t)(reg >> 16);
>               if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
>                       return 64 * 1024 * 1024;
>               else
>                       return 128 * 1024 * 1024;
>       case CHIP_I855:
>               return 128 * 1024 * 1024;
>       case CHIP_I915:
>               reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I915_MSAC);
>               msac = (u_int16_t)(reg >> 16);
>               if (msac & AGP_I915_MSAC_APER_128M)
>                       return 128 * 1024 * 1024;
>               else
>                       return 256 * 1024 * 1024;
>       case CHIP_I965:
>               return 512 * 1024 * 1024;
>       default:
>               aprint_error(": Unknown chipset\n");
>       }
> 
>       return 0;
> }
> 
> static int
> agp_i810_set_aperture(struct agp_softc *sc, u_int32_t aperture)
> {
>       struct agp_i810_softc *isc = sc->as_chipc;
>       pcireg_t reg;
>       u_int16_t miscc, gcc1;
> 
>       switch (isc->chiptype) {
>       case CHIP_I810:
>               /*
>                * Double check for sanity.
>                */
>               if (aperture != (32 * 1024 * 1024) &&
>                   aperture != (64 * 1024 * 1024)) {
>                       printf("%s: bad aperture size %d\n",
>                           sc->as_dev.dv_xname, aperture);
>                       return EINVAL;
>               }
> 
>               reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I810_SMRAM);
>               miscc = (u_int16_t)(reg >> 16);
>               miscc &= ~AGP_I810_MISCC_WINSIZE;
>               if (aperture == 32 * 1024 * 1024)
>                       miscc |= AGP_I810_MISCC_WINSIZE_32;
>               else
>                       miscc |= AGP_I810_MISCC_WINSIZE_64;
> 
>               reg &= 0x0000ffff;
>               reg |= ((pcireg_t)miscc) << 16;
>               pci_conf_write(sc->as_pc, sc->as_tag, AGP_I810_SMRAM, reg);
>               break;
>       case CHIP_I830:
>               if (aperture != (64 * 1024 * 1024) &&
>                   aperture != (128 * 1024 * 1024)) {
>                       printf("%s: bad aperture size %d\n",
>                           sc->as_dev.dv_xname, aperture);
>                       return EINVAL;
>               }
>               reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_I830_GCC0);
>               gcc1 = (u_int16_t)(reg >> 16);
>               gcc1 &= ~AGP_I830_GCC1_GMASIZE;
>               if (aperture == 64 * 1024 * 1024)
>                       gcc1 |= AGP_I830_GCC1_GMASIZE_64;
>               else
>                       gcc1 |= AGP_I830_GCC1_GMASIZE_128;
> 
>               reg &= 0x0000ffff;
>               reg |= ((pcireg_t)gcc1) << 16;
>               pci_conf_write(sc->as_pc, sc->as_tag, AGP_I830_GCC0, reg);
>               break;
>       case CHIP_I855:
>       case CHIP_I915:
>               if (aperture != agp_i810_get_aperture(sc)) {
>                       printf("%s: bad aperture size %d\n",
>                           sc->as_dev.dv_xname, aperture);
>                       return EINVAL;
>               }
>               break;
>       case CHIP_I965:
>               if (aperture != 512 * 1024 * 1024) {
>                       printf("%s: bad aperture size %d\n",
>                           sc->as_dev.dv_xname, aperture);
>                       return EINVAL;
>               }
>               break;
>       }
> 
>       return 0;
> }
> 
> static int
> agp_i810_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
> {
>       struct agp_i810_softc *isc = sc->as_chipc;
> 
>       if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
> #ifdef AGP_DEBUG
>               printf("%s: failed: offset 0x%08x, shift %d, entries %d\n",
>                   sc->as_dev.dv_xname, (int)offset, AGP_PAGE_SHIFT,
>                   isc->gatt->ag_entries);
> #endif
>               return EINVAL;
>       }
> 
>       if (isc->chiptype != CHIP_I830) {
>               if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) {
> #ifdef AGP_DEBUG
>                       printf("%s: trying to bind into stolen memory",
>                           sc->as_dev.dv_xname);
> #endif
>                       return EINVAL;
>               }
>       }
> 
>       WRITEGTT(offset, physical | 1);
>       return 0;
> }
> 
> static int
> agp_i810_unbind_page(struct agp_softc *sc, off_t offset)
> {
>       struct agp_i810_softc *isc = sc->as_chipc;
> 
>       if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT))
>               return EINVAL;
> 
>       if (isc->chiptype != CHIP_I810 ) {
>               if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) {
> #ifdef AGP_DEBUG
>                       printf("%s: trying to unbind from stolen memory",
>                           sc->as_dev.dv_xname);
> #endif
>                       return EINVAL;
>               }
>       }
> 
>       WRITEGTT(offset, 0);
>       return 0;
> }
> 
> /*
>  * Writing via memory mapped registers already flushes all TLBs.
>  */
> static void
> agp_i810_flush_tlb(struct agp_softc *sc)
> {
> }
> 
> static int
> agp_i810_enable(struct agp_softc *sc, u_int32_t mode)
> {
> 
>       return 0;
> }
> 
> static struct agp_memory *
> agp_i810_alloc_memory(struct agp_softc *sc, int type, vsize_t size)
> {
>       struct agp_i810_softc *isc = sc->as_chipc;
>       struct agp_memory *mem;
> 
> #ifdef AGP_DEBUG
>       printf("AGP: alloc(%d, 0x%x)\n", type, (int) size);
> #endif
> 
>       if ((size & (AGP_PAGE_SIZE - 1)) != 0)
>               return 0;
> 
>       if (sc->as_allocated + size > sc->as_maxmem)
>               return 0;
> 
>       if (type == 1) {
>               /*
>                * Mapping local DRAM into GATT.
>                */
>               if (isc->chiptype != CHIP_I810 )
>                       return 0;
>               if (size != isc->dcache_size)
>                       return 0;
>       } else if (type == 2) {
>               /*
>                * Bogus mapping for the hardware cursor.
>                */
>               if (size != AGP_PAGE_SIZE && size != 4 * AGP_PAGE_SIZE)
>                       return 0;
>       }
> 
>       mem = malloc(sizeof *mem, M_AGP, M_WAITOK|M_ZERO);
>       if (mem == NULL)
>               return NULL;
>       mem->am_id = sc->as_nextid++;
>       mem->am_size = size;
>       mem->am_type = type;
> 
>       if (type == 2) {
>               /*
>                * Allocate and wire down the memory now so that we can
>                * get its physical address.
>                */
>               mem->am_dmaseg = malloc(sizeof *mem->am_dmaseg, M_AGP,
>                   M_WAITOK);
>               if (mem->am_dmaseg == NULL) {
>                       free(mem, M_AGP);
>                       return NULL;
>               }
>               if (agp_alloc_dmamem(sc->as_dmat, size, 0,
>                   &mem->am_dmamap, &mem->am_virtual, &mem->am_physical,
>                   mem->am_dmaseg, 1, &mem->am_nseg) != 0) {
>                       free(mem->am_dmaseg, M_AGP);
>                       free(mem, M_AGP);
>                       return NULL;
>               }
>               memset(mem->am_virtual, 0, size);
>       } else if (type != 1) {
>               if (bus_dmamap_create(sc->as_dmat, size, size / PAGE_SIZE + 1,
>                                     size, 0, BUS_DMA_NOWAIT,
>                                     &mem->am_dmamap) != 0) {
>                       free(mem, M_AGP);
>                       return NULL;
>               }
>       }
> 
>       TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link);
>       sc->as_allocated += size;
> 
>       return mem;
> }
> 
> static int
> agp_i810_free_memory(struct agp_softc *sc, struct agp_memory *mem)
> {
>       if (mem->am_is_bound)
>               return EBUSY;
> 
>       if (mem->am_type == 2) {
>               agp_free_dmamem(sc->as_dmat, mem->am_size, mem->am_dmamap,
>                   mem->am_virtual, mem->am_dmaseg, mem->am_nseg);
>               free(mem->am_dmaseg, M_AGP);
>       }
> 
>       sc->as_allocated -= mem->am_size;
>       TAILQ_REMOVE(&sc->as_memory, mem, am_link);
>       free(mem, M_AGP);
>       return 0;
> }
> 
> static int
> agp_i810_bind_memory(struct agp_softc *sc, struct agp_memory *mem,
>                    off_t offset)
> {
>       struct agp_i810_softc *isc = sc->as_chipc;
>       u_int32_t regval, i;
> 
>       /*
>        * XXX evil hack: the PGTBL_CTL appearently gets overwritten by the
>        * X server for mysterious reasons which leads to crashes if we write
>        * to the GTT through the MMIO window.
>        * Until the issue is solved, simply restore it.
>        */
>       regval = bus_space_read_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL);
>       if (regval != (isc->gatt->ag_physical | 1)) {
>               printf("agp_i810_bind_memory: PGTBL_CTL is 0x%x - fixing\n",
>                      regval);
>               bus_space_write_4(isc->bst, isc->bsh, AGP_I810_PGTBL_CTL,
>                                 isc->gatt->ag_physical | 1);
>       }
> 
>       if (mem->am_type == 2) {
>               WRITEGTT(offset, mem->am_physical | 1);
>               mem->am_offset = offset;
>               mem->am_is_bound = 1;
>               return 0;
>       }
> 
>       if (mem->am_type != 1)
>               return agp_generic_bind_memory(sc, mem, offset);
> 
>       if (isc->chiptype != CHIP_I810)
>               return EINVAL;
> 
>       for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
>               WRITEGTT(offset, i | 3);
>       mem->am_is_bound = 1;
>       return 0;
> }
> 
> static int
> agp_i810_unbind_memory(struct agp_softc *sc, struct agp_memory *mem)
> {
>       struct agp_i810_softc *isc = sc->as_chipc;
>       u_int32_t i;
> 
>       if (mem->am_type == 2) {
>               WRITEGTT(mem->am_offset, 0);
>               mem->am_offset = 0;
>               mem->am_is_bound = 0;
>               return 0;
>       }
> 
>       if (mem->am_type != 1)
>               return agp_generic_unbind_memory(sc, mem);
> 
>       if (isc->chiptype != CHIP_I810)
>               return EINVAL;
> 
>       for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
>               WRITEGTT(i, 0);
>       mem->am_is_bound = 0;
>       return 0;
> }
> 
> static void
> agp_i810_powerhook(int why, void *arg)
> {
>       struct agp_softc *sc = (struct agp_softc *)arg;
>       struct agp_i810_softc *isc = sc->as_chipc;
> 
>       if (why == PWR_RESUME) {
>               pci_conf_restore(sc->as_pc, sc->as_tag, &isc->sc_pciconf);
>               agp_flush_cache();
>       } else if ((why == PWR_STANDBY) || (why == PWR_SUSPEND))
>               pci_conf_capture(sc->as_pc, sc->as_tag, &isc->sc_pciconf);
> 
>       return;
> }

Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 4.0_STABLE (GENERIC.MP) #0: Fri Mar  7 13:24:26 CET 2008
        
ptijo%atheria.tumfatig.net@localhost:/home/cvs/src/sys/arch/i386/compile/GENERIC.MP
total memory = 3574 MB
rbus: rbus_min_start set to 0xc0000000
avail memory = 3498 MB
timecounter: Timecounters tick every 10.000 msec
timecounter: Timecounter "i8254" frequency 1193182 Hz quality 100
BIOS32 rev. 0 found at 0xffa10
mainbus0 (root)
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: Intel Core 2 (Merom) (686-class), 1995.14 MHz, id 0x6fa
cpu0: features bfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu0: features bfebfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX>
cpu0: features bfebfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
cpu0: features2 e3bd<SSE3,MONITOR,DS-CPL,VMX,EST,TM2,xTPR>
cpu0: "Intel(R) Core(TM)2 Duo CPU     T7300  @ 2.00GHz"
cpu0: I-cache 32 KB 64B/line 8-way, D-cache 32 KB 64B/line 8-way
cpu0: L2 cache 4 MB 64B/line 16-way
cpu0: using thermal monitor 1
cpu0: Enhanced SpeedStep (1388 mV) 2000 MHz
cpu0: unknown Enhanced SpeedStep CPU.
cpu0: using only highest, current and lowest power states.
cpu0: Enhanced SpeedStep frequencies available (MHz): 2200 2000 1200
cpu0: calibrating local timer
cpu0: apic clock running at 199 MHz
cpu0: 64 page colors
cpu1 at mainbus0: apid 1 (application processor)
cpu1: starting
cpu1: Intel Core 2 (Merom) (686-class), 1995.00 MHz, id 0x6fa
cpu1: features bfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu1: features bfebfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX>
cpu1: features bfebfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
cpu1: features2 e3bd<SSE3,MONITOR,DS-CPL,VMX,EST,TM2,xTPR>
cpu1: "Intel(R) Core(TM)2 Duo CPU     T7300  @ 2.00GHz"
cpu1: I-cache 32 KB 64B/line 8-way, D-cache 32 KB 64B/line 8-way
cpu1: L2 cache 4 MB 64B/line 16-way
cpu1: using thermal monitor 1
ioapic0 at mainbus0 apid 2 (I/O APIC)
ioapic0: pa 0xfec00000, version 20, 24 pins
ioapic0: misconfigured as apic 0
ioapic0: remapped to apic 2
acpi0 at mainbus0: Advanced Configuration and Power Interface
acpi0: using Intel ACPI CA subsystem version 20060217
acpi0: X/RSDT: OemId <DELL  , M08    ,27d70b09>, AslId <ASL ,00000061>
acpi0: SCI interrupting at int 9
timecounter: Timecounter "ACPI-Fast" frequency 3579545 Hz quality 1000
ACPI-Fast 24-bit timer
mpacpi: could not get bus number, assuming bus 0
ACPI Object Type 'Processor' (0x0c) at acpi0 not configured
ACPI Object Type 'Processor' (0x0c) at acpi0 not configured
PNP0A03 [PCI/PCI-X Host Bridge] at acpi0 not configured
pckbc1 at acpi0 (PNP0F13): aux port
pckbc1: irq 12
pckbc2 at acpi0 (PNP0303): kbd port
pckbc2: io 0x60,0x64,0x62,0x66 irq 1
PNP0B00 [AT Real-Time Clock] at acpi0 not configured
attimer1 at acpi0 (PNP0100): AT Timer
attimer1: io 0x40-0x43,0x50-0x53 irq 2
pcppi1 at acpi0 (PNP0800)
pcppi1: io 0x61,0x63,0x65,0x67
pcppi1: children must have an explicit unit
midi0 at pcppi1: PC speaker (CPU-intensive output)
sysbeep0 at pcppi1
PNP0C01 [System Board] at acpi0 not configured
PNP0000 [AT Interrupt Controller] at acpi0 not configured
PNP0200 [AT DMA Controller] at acpi0 not configured
npx1 at acpi0 (PNP0C04)
npx1: io 0xf0-0xff irq 13
npx1: reported by CPUID; using exception 16
PNP0103 [HPET Timer] at acpi0 not configured
PNP0C01 [System Board] at acpi0 not configured
PNP0C01 [System Board] at acpi0 not configured
PNP0C0F [PCI interrupt link device] at acpi0 not configured
PNP0C0F [PCI interrupt link device] at acpi0 not configured
PNP0C0F [PCI interrupt link device] at acpi0 not configured
PNP0C0F [PCI interrupt link device] at acpi0 not configured
PNP0C0F [PCI interrupt link device] at acpi0 not configured
PNP0C0F [PCI interrupt link device] at acpi0 not configured
PNP0C0F [PCI interrupt link device] at acpi0 not configured
PNP0C01 [System Board] at acpi0 not configured
acpilid0 at acpi0 (PNP0C0D): ACPI Lid Switch
acpibut0 at acpi0 (PNP0C0C): ACPI Power Button
acpibut1 at acpi0 (PNP0C0E): ACPI Sleep Button
acpiacad0 at acpi0 (ACPI0003): ACPI AC Adapter
acpibat0 at acpi0 (PNP0C0A-1): ACPI Battery (Control Method)
pnp0c14 at acpi0 not configured
acpitz0 at acpi0: ACPI Thermal Zone
acpitz0: unable to get polling interval; using default of 30.0s
acpitz0: passive cooling mode only
acpitz0: critical 99.0C
pckbd0 at pckbc2 (kbd slot)
pckbc2: using irq 1 for kbd slot
wskbd0 at pckbd0: console keyboard
pms0 at pckbc2 (aux slot)
pckbc2: using irq 12 for aux slot
wsmouse0 at pms0 mux 0
pcppi1: attached to attimer1
pci0 at mainbus0 bus 0: configuration mode 1
pci0: i/o space, memory space enabled, rd/line, rd/mult, wr/inv ok
pchb0 at pci0 dev 0 function 0
pchb0: Intel 82965PM Host Bridge (rev. 0x0c)
agp0 at pchb0: detected 7676k stolen memory
agp0: aperture at 0xe0000000, size 0x20000000
vga1 at pci0 dev 2 function 0: Intel 82965PM Integrated Graphics Device (rev. 
0x0c)
vga1: WARNING: ignoring 64-bit BAR @ 0x10
vga1: WARNING: ignoring 64-bit BAR @ 0x18
wsdisplay0 at vga1 kbdmux 1: console (80x25, vt100 emulation), using wskbd0
wsmux1: connecting to wsdisplay0
Intel 82965PM Integrated Graphics Device (miscellaneous display, revision 0x0c) 
at pci0 dev 2 function 1 not configured
uhci0 at pci0 dev 26 function 0: Intel 82801H USB UHCI Controller (rev. 0x02)
uhci0: interrupting at ioapic0 pin 20 (irq 10)
usb0 at uhci0: USB revision 1.0
uhub0 at usb0
uhub0: Intel UHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub0: 2 ports with 2 removable, self powered
uhci1 at pci0 dev 26 function 1: Intel 82801H USB UHCI Controller (rev. 0x02)
uhci1: interrupting at ioapic0 pin 21 (irq 9)
usb1 at uhci1: USB revision 1.0
uhub1 at usb1
uhub1: Intel UHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub1: 2 ports with 2 removable, self powered
ehci0 at pci0 dev 26 function 7: Intel 82801H USB EHCI Controller (rev. 0x02)
ehci0: interrupting at ioapic0 pin 22 (irq 7)
ehci0: BIOS has given up ownership
ehci0: EHCI version 1.0
ehci0: companion controllers, 2 ports each: uhci0 uhci1
usb2 at ehci0: USB revision 2.0
uhub2 at usb2
uhub2: Intel EHCI root hub, class 9/0, rev 2.00/1.00, addr 1
uhub2: 4 ports with 4 removable, self powered
azalia0 at pci0 dev 27 function 0: Generic High Definition Audio Controller
azalia0: interrupting at ioapic0 pin 21 (irq 9)
azalia0: host: Intel 82801H High Definition Audio Controller (rev. 2)
azalia0: host: High Definition Audio rev. 1.0
ppb0 at pci0 dev 28 function 0: Intel 82801H PCI Express Port #1 (rev. 0x02)
pci1 at ppb0 bus 11
pci1: i/o space, memory space enabled, rd/line, wr/inv ok
ppb1 at pci0 dev 28 function 1: Intel 82801H PCI Express Port #2 (rev. 0x02)
pci2 at ppb1 bus 12
pci2: i/o space, memory space enabled, rd/line, wr/inv ok
wpi0 at pci2 dev 0 function 0: Intel PRO/Wireless LAN 3945ABG Mini-PCI Adapter 
(rev. 0x02)
wpi0: interrupting at ioapic0 pin 17 (irq 10)
, MoW2, address 00:1b:77:b6:58:e6
wpi0: 11a rates: 6Mbps 9Mbps 12Mbps 18Mbps 24Mbps 36Mbps 48Mbps 54Mbps
wpi0: 11b rates: 1Mbps 2Mbps 5.5Mbps 11Mbps
wpi0: 11g rates: 1Mbps 2Mbps 5.5Mbps 11Mbps 6Mbps 9Mbps 12Mbps 18Mbps 24Mbps 
36Mbps 48Mbps 54Mbps
ppb2 at pci0 dev 28 function 3: Intel 82801H PCI Express Port #4 (rev. 0x02)
pci3 at ppb2 bus 13
pci3: i/o space, memory space enabled, rd/line, wr/inv ok
ppb3 at pci0 dev 28 function 5: Intel 82801H PCI Express Port #6 (rev. 0x02)
pci4 at ppb3 bus 9
pci4: i/o space, memory space enabled, rd/line, wr/inv ok
Broadcom BCM5906M NetLink Fast Ethernet (ethernet network, revision 0x02) at 
pci4 dev 0 function 0 not configured
uhci2 at pci0 dev 29 function 0: Intel 82801H USB UHCI Controller (rev. 0x02)
uhci2: interrupting at ioapic0 pin 20 (irq 10)
usb3 at uhci2: USB revision 1.0
uhub3 at usb3
uhub3: Intel UHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub3: 2 ports with 2 removable, self powered
uhci3 at pci0 dev 29 function 1: Intel 82801H USB UHCI Controller (rev. 0x02)
uhci3: interrupting at ioapic0 pin 21 (irq 9)
usb4 at uhci3: USB revision 1.0
uhub4 at usb4
uhub4: Intel UHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub4: 2 ports with 2 removable, self powered
uhci4 at pci0 dev 29 function 2: Intel 82801H USB UHCI Controller (rev. 0x02)
uhci4: interrupting at ioapic0 pin 22 (irq 7)
usb5 at uhci4: USB revision 1.0
uhub5 at usb5
uhub5: Intel UHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub5: 2 ports with 2 removable, self powered
ehci1 at pci0 dev 29 function 7: Intel 82801H USB EHCI Controller (rev. 0x02)
ehci1: interrupting at ioapic0 pin 20 (irq 10)
ehci1: BIOS has given up ownership
ehci1: EHCI version 1.0
ehci1: companion controllers, 2 ports each: uhci2 uhci3 uhci4
usb6 at ehci1: USB revision 2.0
uhub6 at usb6
uhub6: Intel EHCI root hub, class 9/0, rev 2.00/1.00, addr 1
uhub6: 6 ports with 6 removable, self powered
ppb4 at pci0 dev 30 function 0: Intel 82801BAM Hub-PCI Bridge (rev. 0xf2)
pci5 at ppb4 bus 3
pci5: i/o space, memory space enabled
fwohci0 at pci5 dev 1 function 0: Ricoh product 0x0832 (rev. 0x05)
fwohci0: interrupting at ioapic0 pin 19 (irq 5)
fwohci0: OHCI version 1.10 (ROM=0)
fwohci0: No. of Isochronous channels is 4.
fwohci0: EUI64 43:4f:c0:00:22:0d:8c:70
fwohci0: Phy 1394a available S400, 1 ports.
fwohci0: Link S400, max_rec 2048 bytes.
ieee1394if0 at fwohci0: IEEE1394 bus
fwip0 at ieee1394if0: IP over IEEE1394
fwohci0: Initiate bus reset
Ricoh 5C822 SD/MMC Host Adapter (SD Host Controller system, interface 0x01, 
revision 0x22) at pci5 dev 1 function 1 not configured
Ricoh 5C843 MMC Host Controller (miscellaneous system, revision 0x12) at pci5 
dev 1 function 2 not configured
Ricoh product 0x0592 (miscellaneous system, revision 0x12) at pci5 dev 1 
function 3 not configured
Ricoh product 0x0852 (miscellaneous system, revision 0x12) at pci5 dev 1 
function 4 not configured
pcib0 at pci0 dev 31 function 0
pcib0: Intel 82801HBM LPC Interface Bridge (rev. 0x02)
piixide0 at pci0 dev 31 function 1
piixide0: Intel 82801HBM IDE Controller (ICH8M) (rev. 0x02)
piixide0: bus-master DMA support present
piixide0: primary channel configured to compatibility mode
piixide0: primary channel interrupting at ioapic0 pin 14 (irq 14)
atabus0 at piixide0 channel 0
piixide0: secondary channel configured to compatibility mode
piixide0: secondary channel ignored (disabled)
ahcisata0 at pci0 dev 31 function 2: Intel 82801HBM SATA Controller
ahcisata0: interrupting at ioapic0 pin 17 (irq 10)
ahcisata0: AHCI revision 1.1, 3 ports, 32 command slots, features 0xe720e0c0
atabus1 at ahcisata0 channel 0
atabus2 at ahcisata0 channel 2
Intel 82801H SMBus Controller (SMBus serial bus, revision 0x02) at pci0 dev 31 
function 3 not configured
isa0 at pcib0
isapnp0 at isa0 port 0x279: ISA Plug 'n Play device support
isapnp0: no ISA Plug 'n Play devices found
ioapic0: enabling
WARNING: Callback scheduled before sysmon task queue thread present.
fwohci0: node_id=0xc800ffc0, gen=1, CYCLEMASTER mode
ieee1394if0: 1 nodes, maxhop <= 0, cable IRM = 0 (me)
ieee1394if0: bus manager 0 (me)
timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
azalia0: codec[0]: 0x8384/0x7616 (rev. 2.1)
azalia0: codec[0]: High Definition Audio rev. 1.0
azalia0: playback: max channels=2, encodings=1<PCM>
azalia0: playback: PCM 
formats=e07e0<24bit,20bit,16bit,192kHz,176.4kHz,96kHz,88.2kHz,48kHz,44.1kHz>
azalia0: recording: max channels=2, encodings=1<PCM>
azalia0: recording: PCM 
formats=e07e0<24bit,20bit,16bit,192kHz,176.4kHz,96kHz,88.2kHz,48kHz,44.1kHz>
azalia0: codec[2]: 0x1095/0x1392 (rev. 0.0)
azalia0: codec[2]: High Definition Audio rev. 1.0
azalia0: invalid PCM format: 0x00000000
audio0 at azalia0: full duplex, independent
Kernelized RAIDframe activated
Too many symbols for tree, skipping 3343 symbols
atapibus0 at atabus0: 2 targets
cd0 at atapibus0 drive 0: <MATSHITA DVD+/-RW UJ-857G, , Z111> cdrom removable
cd0: 32-bit data port
cd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 2 (Ultra/33)
cd0(piixide0:0:0): using PIO mode 4, Ultra-DMA mode 2 (Ultra/33) (using DMA)
ahcisata0 port 0: device present, speed: 3.0Gb/s
wd0 at atabus1 drive 0: <Hitachi HTS722020K9A300>
wd0: drive supports 16-sector PIO transfers, LBA48 addressing
wd0: 186 GB, 387621 cyl, 16 head, 63 sec, 512 bytes/sect x 390721968 sectors
wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133)
wd0(ahcisata0:0:0): using PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133) 
(using DMA)
ahcisata0 port 2: PHY offline
umass0 at uhub6 port 1 configuration 1 interface 0
umass0: C^Bpress Semiconductor USB2.0 Storage Device, rev 2.00/0.01, addr 2
umass0: using SCSI over Bulk-Only
scsibus0 at umass0: 2 targets, 1 lun per target
sd0 at scsibus0 target 0 lun 0: <SAMSUNG, MP0603H, 0000> disk fixed
sd0: 57277 MB, 16383 cyl, 16 head, 63 sec, 512 bytes/sect x 117304992 sectors
uhub7 at uhub0 port 2
uhub7: Broadcom BCM2045B2, class 9/0, rev 2.00/1.00, addr 2
uhub7: 3 ports with 0 removable, bus powered
ugen0 at uhub6 port 6
ugen0: OmniVision Technologies, Inc. -2640-07.05.16.3 Laptop Integrated Webcam, 
rev 2.00/1.00, addr 3
ugen1 at uhub1 port 2
ugen1: Novatel Wireless Novatel Wireless HSDPA Modem, rev 1.10/0.00, addr 2
boot device: sd0
root on sd0a dumps on sd0b
root file system type: ffs
cpu1: CPU 1 running
ubt0 at uhub7 port 1 configuration 1 interface 0
ubt0: Broadcom Corp BCM2045, rev 2.00/1.00, addr 3
uhidev0 at uhub7 port 2 configuration 1 interface 0
uhidev0: Broadcom Corp product 0x4502, rev 2.00/1.00, addr 4, iclass 3/1
ukbd0 at uhidev0
wskbd1 at ukbd0 mux 1
wskbd1: connecting to wsdisplay0
uhidev1 at uhub7 port 3 configuration 1 interface 0
uhidev1: Broadcom Corp product 0x4503, rev 2.00/1.00, addr 5, iclass 3/1
uhidev1: 125 report ids
ums0 at uhidev1 reportid 2: 3 buttons
wsmouse1 at ums0 mux 0
uhid0 at uhidev1 reportid 125: input=2, output=0, feature=0
wsdisplay0: screen 1 added (80x25, vt100 emulation)
wsdisplay0: screen 2 added (80x25, vt100 emulation)
wsdisplay0: screen 3 added (80x25, vt100 emulation)
wsdisplay0: screen 4 added (80x25, vt100 emulation)
X Window System Version 1.3.0
Release Date: 19 April 2007
X Protocol Version 11, Revision 0, Release 1.3
Build Operating System: UNKNOWN 
Current Operating System: NetBSD atheria.tumfatig.net 4.0_STABLE NetBSD 
4.0_STABLE (GENERIC.MP) #0: Fri Mar  7 13:24:26 CET 2008  
ptijo%atheria.tumfatig.net@localhost:/home/cvs/src/sys/arch/i386/compile/GENERIC.MP
 i386
Build Date: 01 December 2007
        Before reporting problems, check http://wiki.x.org
        to make sure that you have the latest version.
Module Loader present
Markers: (--) probed, (**) from config file, (==) default setting,
        (++) from command line, (!!) notice, (II) informational,
        (WW) warning, (EE) error, (NI) not implemented, (??) unknown.
(==) Log file: "/var/log/Xorg.0.log", Time: Fri Mar  7 18:33:03 2008
(==) Using config file: "/etc/X11/xorg.conf"
(==) ServerLayout "X.org Configured"
(**) |-->Screen "Screen0" (0)
(**) |   |-->Monitor "Monitor0"
(**) |   |-->Device "Card0"
(**) |-->Input Device "Mouse0"
(**) |-->Input Device "Keyboard0"
(WW) The directory "/usr/pkg/lib/X11/fonts/OTF" does not exist.
        Entry deleted from font path.
(**) FontPath set to:
        /usr/pkg/lib/X11/fonts/misc/,
        /usr/pkg/lib/X11/fonts/TTF/,
        /usr/pkg/lib/X11/fonts/Type1/,
        /usr/pkg/lib/X11/fonts/100dpi/:unscaled,
        /usr/pkg/lib/X11/fonts/75dpi/:unscaled
(**) RgbPath set to "/usr/pkg/share/X11/rgb"
(**) ModulePath set to "/usr/pkg/lib/xorg/modules"
(**) Option "BlankTime" "5"
(**) Option "StandbyTime" "20"
(**) Option "SuspendTime" "30"
(**) Option "OffTime" "60"
(**) Extension "Composite" is enabled
(II) Loader magic: 0x81c9400
(II) Module ABI versions:
        X.Org ANSI C Emulation: 0.3
        X.Org Video Driver: 1.2
        X.Org XInput driver : 0.7
        X.Org Server Extension : 0.3
        X.Org Font Renderer : 0.5
(II) Loader running on netbsd
(II) LoadModule: "pcidata"
(II) Loading /usr/pkg/lib/xorg/modules//libpcidata.so
(II) Module pcidata: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.0.0
        ABI class: X.Org Video Driver, version 1.2
(--) Using wscons driver in pcvt compatibility mode (version 3.32)
(II) PCI: Probing config type using method 1
(II) PCI: Config type is 1
(II) PCI: stages = 0x03, oldVal1 = 0x00000000, mode1Res1 = 0x80000000
(II) PCI: PCI scan (all values are in hex)
(II) PCI: 00:00:0: chip 8086,2a00 card 1028,0209 rev 0c class 06,00,00 hdr 00
(II) PCI: 00:02:0: chip 8086,2a02 card 1028,0209 rev 0c class 03,00,00 hdr 80
(II) PCI: 00:02:1: chip 8086,2a03 card 1028,0209 rev 0c class 03,80,00 hdr 80
(II) PCI: 00:1a:0: chip 8086,2834 card 1028,0209 rev 02 class 0c,03,00 hdr 80
(II) PCI: 00:1a:1: chip 8086,2835 card 1028,0209 rev 02 class 0c,03,00 hdr 00
(II) PCI: 00:1a:7: chip 8086,283a card 1028,0209 rev 02 class 0c,03,20 hdr 00
(II) PCI: 00:1b:0: chip 8086,284b card 1028,0209 rev 02 class 04,03,00 hdr 00
(II) PCI: 00:1c:0: chip 8086,283f card 0000,0000 rev 02 class 06,04,00 hdr 81
(II) PCI: 00:1c:1: chip 8086,2841 card 0000,0000 rev 02 class 06,04,00 hdr 81
(II) PCI: 00:1c:3: chip 8086,2845 card 0000,0000 rev 02 class 06,04,00 hdr 81
(II) PCI: 00:1c:5: chip 8086,2849 card 0000,0000 rev 02 class 06,04,00 hdr 81
(II) PCI: 00:1d:0: chip 8086,2830 card 1028,0209 rev 02 class 0c,03,00 hdr 80
(II) PCI: 00:1d:1: chip 8086,2831 card 1028,0209 rev 02 class 0c,03,00 hdr 00
(II) PCI: 00:1d:2: chip 8086,2832 card 1028,0209 rev 02 class 0c,03,00 hdr 00
(II) PCI: 00:1d:7: chip 8086,2836 card 1028,0209 rev 02 class 0c,03,20 hdr 00
(II) PCI: 00:1e:0: chip 8086,2448 card 0000,0000 rev f2 class 06,04,01 hdr 01
(II) PCI: 00:1f:0: chip 8086,2815 card 1028,0209 rev 02 class 06,01,00 hdr 80
(II) PCI: 00:1f:1: chip 8086,2850 card 1028,0209 rev 02 class 01,01,8a hdr 00
(II) PCI: 00:1f:2: chip 8086,2829 card 1028,0209 rev 02 class 01,06,01 hdr 00
(II) PCI: 00:1f:3: chip 8086,283e card 1028,0209 rev 02 class 0c,05,00 hdr 00
(II) PCI: 03:01:0: chip 1180,0832 card 1028,0209 rev 05 class 0c,00,10 hdr 80
(II) PCI: 03:01:1: chip 1180,0822 card 1028,0209 rev 22 class 08,05,01 hdr 80
(II) PCI: 03:01:2: chip 1180,0843 card 1028,0209 rev 12 class 08,80,00 hdr 80
(II) PCI: 03:01:3: chip 1180,0592 card 1028,0209 rev 12 class 08,80,00 hdr 80
(II) PCI: 03:01:4: chip 1180,0852 card 1028,0209 rev 12 class 08,80,00 hdr 80
(II) PCI: 09:00:0: chip 14e4,1713 card 1028,0209 rev 02 class 02,00,00 hdr 00
(II) PCI: 0c:00:0: chip 8086,4222 card 8086,1021 rev 02 class 02,80,00 hdr 00
(II) PCI: End of PCI scan
(II) Intel Bridge workaround enabled
(II) Host-to-PCI bridge:
(II) Bus 0: bridge is at (0:0:0), (0,0,13), BCTRL: 0x0008 (VGA_EN is set)
(II) Bus 0 I/O range:
        [0] -1  0       0x00000000 - 0x0000ffff (0x10000) IX[B]
(II) Bus 0 non-prefetchable memory range:
        [0] -1  0       0x00000000 - 0xffffffff (0x0) MX[B]
(II) Bus 0 prefetchable memory range:
        [0] -1  0       0x00000000 - 0xffffffff (0x0) MX[B]
(II) PCI-to-PCI bridge:
(II) Bus 11: bridge is at (0:28:0), (0,11,11), BCTRL: 0x0002 (VGA_EN is cleared)
(II) PCI-to-PCI bridge:
(II) Bus 12: bridge is at (0:28:1), (0,12,12), BCTRL: 0x0002 (VGA_EN is cleared)
(II) Bus 12 non-prefetchable memory range:
        [0] -1  0       0xfe800000 - 0xfe8fffff (0x100000) MX[B]
(II) PCI-to-PCI bridge:
(II) Bus 13: bridge is at (0:28:3), (0,13,14), BCTRL: 0x0002 (VGA_EN is cleared)
(II) Bus 13 I/O range:
        [0] -1  0       0x0000d000 - 0x0000dfff (0x1000) IX[B]
(II) Bus 13 non-prefetchable memory range:
        [0] -1  0       0xfe600000 - 0xfe7fffff (0x200000) MX[B]
(II) Bus 13 prefetchable memory range:
        [0] -1  0       0xf0000000 - 0xf01fffff (0x200000) MX[B]
(II) PCI-to-PCI bridge:
(II) Bus 9: bridge is at (0:28:5), (0,9,9), BCTRL: 0x0002 (VGA_EN is cleared)
(II) Bus 9 non-prefetchable memory range:
        [0] -1  0       0xfe500000 - 0xfe5fffff (0x100000) MX[B]
(II) Subtractive PCI-to-PCI bridge:
(II) Bus 3: bridge is at (0:30:0), (0,3,3), BCTRL: 0x0002 (VGA_EN is cleared)
(II) Bus 3 non-prefetchable memory range:
        [0] -1  0       0xfe400000 - 0xfe4fffff (0x100000) MX[B]
(II) PCI-to-ISA bridge:
(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
(--) PCI:*(0:2:0) Intel Corporation Mobile Integrated Graphics Controller rev 
12, Mem @ 0xfea00000/20, 0xe0000000/28, I/O @ 0xeff8/3
(--) PCI: (0:2:1) Intel Corporation Mobile Integrated Graphics Controller rev 
12, Mem @ 0xfeb00000/20
(II) Addressable bus resource ranges are
        [0] -1  0       0x00000000 - 0xffffffff (0x0) MX[B]
        [1] -1  0       0x00000000 - 0x0000ffff (0x10000) IX[B]
(II) OS-reported resource ranges:
        [0] -1  0       0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
        [1] -1  0       0x000f0000 - 0x000fffff (0x10000) MX[B]
        [2] -1  0       0x000c0000 - 0x000effff (0x30000) MX[B]
        [3] -1  0       0x00000000 - 0x0009ffff (0xa0000) MX[B]
        [4] -1  0       0x0000ffff - 0x0000ffff (0x1) IX[B]
        [5] -1  0       0x00000000 - 0x000000ff (0x100) IX[B]
(II) Active PCI resource ranges:
        [0] -1  0       0xfe8ff000 - 0xfe8fffff (0x1000) MX[B]E
        [1] -1  0       0xfe5f0000 - 0xfe5fffff (0x10000) MX[B]E
        [2] -1  0       0xfe4ff700 - 0xfe4ff7ff (0x100) MX[B]E
        [3] -1  0       0xfe4ff600 - 0xfe4ff7ff (0x200) MX[B]E
        [4] -1  0       0xfe4ff500 - 0xfe4ff5ff (0x100) MX[B]E
        [5] -1  0       0xfe4ff400 - 0xfe4ff7ff (0x400) MX[B]E
        [6] -1  0       0xfe4ff800 - 0xfe4fffff (0x800) MX[B]E
        [7] -1  0       0xfe9fb700 - 0xfe9fb7ff (0x100) MX[B]E
        [8] -1  0       0xfe9fb800 - 0xfe9fbfff (0x800) MX[B]E
        [9] -1  0       0xfed1c000 - 0xfed1ffff (0x4000) MX[B]E
        [10] -1 0       0xfe9fc000 - 0xfe9fffff (0x4000) MX[B]E
        [11] -1 0       0xfed1c400 - 0xfed1c7ff (0x400) MX[B]E
        [12] -1 0       0xfeb00000 - 0xfebfffff (0x100000) MX[B](B)
        [13] -1 0       0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
        [14] -1 0       0xfea00000 - 0xfeafffff (0x100000) MX[B](B)
        [15] -1 0       0x000010c0 - 0x000010ff (0x40) IX[B]E
        [16] -1 0       0x00006ee0 - 0x00006eff (0x20) IX[B]E
        [17] -1 0       0x00006ec8 - 0x00006ecf (0x8) IX[B]E
        [18] -1 0       0x00006ec0 - 0x00006eff (0x40) IX[B]E
        [19] -1 0       0x00006eb8 - 0x00006ebf (0x8) IX[B]E
        [20] -1 0       0x00006eb0 - 0x00006ebf (0x10) IX[B]E
        [21] -1 0       0x00006fa0 - 0x00006fbf (0x20) IX[B]E
        [22] -1 0       0x00000374 - 0x00000377 (0x4) IX[B]E
        [23] -1 0       0x00000170 - 0x0000017f (0x10) IX[B]E
        [24] -1 0       0x000003f4 - 0x000003f7 (0x4) IX[B]E
        [25] -1 0       0x000001f0 - 0x000001ff (0x10) IX[B]E
        [26] -1 0       0x00006f40 - 0x00006f7f (0x40) IX[B]E
        [27] -1 0       0x00006f60 - 0x00006f7f (0x20) IX[B]E
        [28] -1 0       0x00006f80 - 0x00006fff (0x80) IX[B]E
        [29] -1 0       0x00006f00 - 0x00006fff (0x100) IX[B]E
        [30] -1 0       0x00006f20 - 0x00006f3f (0x20) IX[B]E
        [31] -1 0       0x0000eff8 - 0x0000efff (0x8) IX[B](B)
(II) PCI Memory resource overlap reduced 0xfe4ff600 from 0xfe4ff7ff to 
0xfe4ff6ff
(II) PCI Memory resource overlap reduced 0xfe4ff400 from 0xfe4ff7ff to 
0xfe4ff4ff
(II) PCI I/O resource overlap reduced 0x00006ec0 from 0x00006eff to 0x00006ec7
(II) PCI I/O resource overlap reduced 0x00006eb0 from 0x00006ebf to 0x00006eb7
(II) PCI Memory resource overlap reduced 0xfed1c000 from 0xfed1ffff to 
0xfed1c3ff
(II) PCI I/O resource overlap reduced 0x00006f40 from 0x00006f7f to 0x00006f5f
(II) PCI I/O resource overlap reduced 0x00006f80 from 0x00006fff to 0x00006f9f
(II) PCI I/O resource overlap reduced 0x00006f00 from 0x00006fff to 0x00006f1f
(II) Active PCI resource ranges after removing overlaps:
        [0] -1  0       0xfe8ff000 - 0xfe8fffff (0x1000) MX[B]E
        [1] -1  0       0xfe5f0000 - 0xfe5fffff (0x10000) MX[B]E
        [2] -1  0       0xfe4ff700 - 0xfe4ff7ff (0x100) MX[B]E
        [3] -1  0       0xfe4ff600 - 0xfe4ff6ff (0x100) MX[B]E
        [4] -1  0       0xfe4ff500 - 0xfe4ff5ff (0x100) MX[B]E
        [5] -1  0       0xfe4ff400 - 0xfe4ff4ff (0x100) MX[B]E
        [6] -1  0       0xfe4ff800 - 0xfe4fffff (0x800) MX[B]E
        [7] -1  0       0xfe9fb700 - 0xfe9fb7ff (0x100) MX[B]E
        [8] -1  0       0xfe9fb800 - 0xfe9fbfff (0x800) MX[B]E
        [9] -1  0       0xfed1c000 - 0xfed1c3ff (0x400) MX[B]E
        [10] -1 0       0xfe9fc000 - 0xfe9fffff (0x4000) MX[B]E
        [11] -1 0       0xfed1c400 - 0xfed1c7ff (0x400) MX[B]E
        [12] -1 0       0xfeb00000 - 0xfebfffff (0x100000) MX[B](B)
        [13] -1 0       0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
        [14] -1 0       0xfea00000 - 0xfeafffff (0x100000) MX[B](B)
        [15] -1 0       0x000010c0 - 0x000010ff (0x40) IX[B]E
        [16] -1 0       0x00006ee0 - 0x00006eff (0x20) IX[B]E
        [17] -1 0       0x00006ec8 - 0x00006ecf (0x8) IX[B]E
        [18] -1 0       0x00006ec0 - 0x00006ec7 (0x8) IX[B]E
        [19] -1 0       0x00006eb8 - 0x00006ebf (0x8) IX[B]E
        [20] -1 0       0x00006eb0 - 0x00006eb7 (0x8) IX[B]E
        [21] -1 0       0x00006fa0 - 0x00006fbf (0x20) IX[B]E
        [22] -1 0       0x00000374 - 0x00000377 (0x4) IX[B]E
        [23] -1 0       0x00000170 - 0x0000017f (0x10) IX[B]E
        [24] -1 0       0x000003f4 - 0x000003f7 (0x4) IX[B]E
        [25] -1 0       0x000001f0 - 0x000001ff (0x10) IX[B]E
        [26] -1 0       0x00006f40 - 0x00006f5f (0x20) IX[B]E
        [27] -1 0       0x00006f60 - 0x00006f7f (0x20) IX[B]E
        [28] -1 0       0x00006f80 - 0x00006f9f (0x20) IX[B]E
        [29] -1 0       0x00006f00 - 0x00006f1f (0x20) IX[B]E
        [30] -1 0       0x00006f20 - 0x00006f3f (0x20) IX[B]E
        [31] -1 0       0x0000eff8 - 0x0000efff (0x8) IX[B](B)
(II) OS-reported resource ranges after removing overlaps with PCI:
        [0] -1  0       0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
        [1] -1  0       0x000f0000 - 0x000fffff (0x10000) MX[B]
        [2] -1  0       0x000c0000 - 0x000effff (0x30000) MX[B]
        [3] -1  0       0x00000000 - 0x0009ffff (0xa0000) MX[B]
        [4] -1  0       0x0000ffff - 0x0000ffff (0x1) IX[B]
        [5] -1  0       0x00000000 - 0x000000ff (0x100) IX[B]
(II) All system resource ranges:
        [0] -1  0       0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
        [1] -1  0       0x000f0000 - 0x000fffff (0x10000) MX[B]
        [2] -1  0       0x000c0000 - 0x000effff (0x30000) MX[B]
        [3] -1  0       0x00000000 - 0x0009ffff (0xa0000) MX[B]
        [4] -1  0       0xfe8ff000 - 0xfe8fffff (0x1000) MX[B]E
        [5] -1  0       0xfe5f0000 - 0xfe5fffff (0x10000) MX[B]E
        [6] -1  0       0xfe4ff700 - 0xfe4ff7ff (0x100) MX[B]E
        [7] -1  0       0xfe4ff600 - 0xfe4ff6ff (0x100) MX[B]E
        [8] -1  0       0xfe4ff500 - 0xfe4ff5ff (0x100) MX[B]E
        [9] -1  0       0xfe4ff400 - 0xfe4ff4ff (0x100) MX[B]E
        [10] -1 0       0xfe4ff800 - 0xfe4fffff (0x800) MX[B]E
        [11] -1 0       0xfe9fb700 - 0xfe9fb7ff (0x100) MX[B]E
        [12] -1 0       0xfe9fb800 - 0xfe9fbfff (0x800) MX[B]E
        [13] -1 0       0xfed1c000 - 0xfed1c3ff (0x400) MX[B]E
        [14] -1 0       0xfe9fc000 - 0xfe9fffff (0x4000) MX[B]E
        [15] -1 0       0xfed1c400 - 0xfed1c7ff (0x400) MX[B]E
        [16] -1 0       0xfeb00000 - 0xfebfffff (0x100000) MX[B](B)
        [17] -1 0       0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
        [18] -1 0       0xfea00000 - 0xfeafffff (0x100000) MX[B](B)
        [19] -1 0       0x0000ffff - 0x0000ffff (0x1) IX[B]
        [20] -1 0       0x00000000 - 0x000000ff (0x100) IX[B]
        [21] -1 0       0x000010c0 - 0x000010ff (0x40) IX[B]E
        [22] -1 0       0x00006ee0 - 0x00006eff (0x20) IX[B]E
        [23] -1 0       0x00006ec8 - 0x00006ecf (0x8) IX[B]E
        [24] -1 0       0x00006ec0 - 0x00006ec7 (0x8) IX[B]E
        [25] -1 0       0x00006eb8 - 0x00006ebf (0x8) IX[B]E
        [26] -1 0       0x00006eb0 - 0x00006eb7 (0x8) IX[B]E
        [27] -1 0       0x00006fa0 - 0x00006fbf (0x20) IX[B]E
        [28] -1 0       0x00000374 - 0x00000377 (0x4) IX[B]E
        [29] -1 0       0x00000170 - 0x0000017f (0x10) IX[B]E
        [30] -1 0       0x000003f4 - 0x000003f7 (0x4) IX[B]E
        [31] -1 0       0x000001f0 - 0x000001ff (0x10) IX[B]E
        [32] -1 0       0x00006f40 - 0x00006f5f (0x20) IX[B]E
        [33] -1 0       0x00006f60 - 0x00006f7f (0x20) IX[B]E
        [34] -1 0       0x00006f80 - 0x00006f9f (0x20) IX[B]E
        [35] -1 0       0x00006f00 - 0x00006f1f (0x20) IX[B]E
        [36] -1 0       0x00006f20 - 0x00006f3f (0x20) IX[B]E
        [37] -1 0       0x0000eff8 - 0x0000efff (0x8) IX[B](B)
(II) LoadModule: "dbe"
(II) Loading /usr/pkg/lib/xorg/modules/extensions//libdbe.so
(II) Module dbe: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.0.0
        Module class: X.Org Server Extension
        ABI class: X.Org Server Extension, version 0.3
(II) Loading extension DOUBLE-BUFFER
(II) LoadModule: "dri"
(II) Loading /usr/pkg/lib/xorg/modules/extensions//libdri.so
(II) Module dri: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.0.0
        ABI class: X.Org Server Extension, version 0.3
(II) Loading extension XFree86-DRI
(II) LoadModule: "extmod"
(II) Loading /usr/pkg/lib/xorg/modules/extensions//libextmod.so
(II) Module extmod: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.0.0
        Module class: X.Org Server Extension
        ABI class: X.Org Server Extension, version 0.3
(II) Loading extension SHAPE
(II) Loading extension MIT-SUNDRY-NONSTANDARD
(II) Loading extension BIG-REQUESTS
(II) Loading extension SYNC
(II) Loading extension MIT-SCREEN-SAVER
(II) Loading extension XC-MISC
(II) Loading extension XFree86-VidModeExtension
(II) Loading extension XFree86-Misc
(II) Loading extension XFree86-DGA
(II) Loading extension DPMS
(II) Loading extension TOG-CUP
(II) Loading extension Extended-Visual-Information
(II) Loading extension XVideo
(II) Loading extension XVideo-MotionCompensation
(II) Loading extension X-Resource
(II) LoadModule: "glx"
(II) Loading /usr/pkg/lib/xorg/modules/extensions//libglx.so
(II) Module glx: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.0.0
        ABI class: X.Org Server Extension, version 0.3
(==) AIGLX enabled
(II) Loading extension GLX
(II) LoadModule: "record"
(II) Loading /usr/pkg/lib/xorg/modules/extensions//librecord.so
(II) Module record: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.13.0
        Module class: X.Org Server Extension
        ABI class: X.Org Server Extension, version 0.3
(II) Loading extension RECORD
(II) LoadModule: "xtrap"
(II) Loading /usr/pkg/lib/xorg/modules/extensions//libxtrap.so
(II) Module xtrap: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.0.0
        Module class: X.Org Server Extension
        ABI class: X.Org Server Extension, version 0.3
(II) Loading extension DEC-XTRAP
(II) LoadModule: "freetype"
(II) Loading /usr/pkg/lib/xorg/modules/fonts//libfreetype.so
(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
        compiled for 1.3.0, module version = 2.1.0
        Module class: X.Org Font Renderer
        ABI class: X.Org Font Renderer, version 0.5
(II) Loading font FreeType
(II) LoadModule: "type1"
(II) Loading /usr/pkg/lib/xorg/modules/fonts//libtype1.so
(II) Module type1: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.0.2
        Module class: X.Org Font Renderer
        ABI class: X.Org Font Renderer, version 0.5
(II) Loading font Type1
(II) LoadModule: "intel"
(II) Loading /usr/pkg/lib/xorg/modules/drivers//intel_drv.so
(II) Module intel: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 2.1.1
        Module class: X.Org Video Driver
        ABI class: X.Org Video Driver, version 1.2
(II) LoadModule: "mouse"
(II) Loading /usr/pkg/lib/xorg/modules/input//mouse_drv.so
(II) Module mouse: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.2.2
        Module class: X.Org XInput Driver
        ABI class: X.Org XInput driver, version 0.7
(II) LoadModule: "kbd"
(II) Loading /usr/pkg/lib/xorg/modules/input//kbd_drv.so
(II) Module kbd: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.1.0
        Module class: X.Org XInput Driver
        ABI class: X.Org XInput driver, version 0.7
(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
        i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
        E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, 965G, 965Q, 946GZ,
        965GM, 965GME/GLE, G33, Q35, Q33
(II) Primary Device is: PCI 00:02:0
(WW) intel: No matching Device section for instance (BusID PCI:0:2:1) found
(--) Chipset 965GM found
(II) resource ranges after xf86ClaimFixedResources() call:
        [0] -1  0       0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
        [1] -1  0       0x000f0000 - 0x000fffff (0x10000) MX[B]
        [2] -1  0       0x000c0000 - 0x000effff (0x30000) MX[B]
        [3] -1  0       0x00000000 - 0x0009ffff (0xa0000) MX[B]
        [4] -1  0       0xfe8ff000 - 0xfe8fffff (0x1000) MX[B]E
        [5] -1  0       0xfe5f0000 - 0xfe5fffff (0x10000) MX[B]E
        [6] -1  0       0xfe4ff700 - 0xfe4ff7ff (0x100) MX[B]E
        [7] -1  0       0xfe4ff600 - 0xfe4ff6ff (0x100) MX[B]E
        [8] -1  0       0xfe4ff500 - 0xfe4ff5ff (0x100) MX[B]E
        [9] -1  0       0xfe4ff400 - 0xfe4ff4ff (0x100) MX[B]E
        [10] -1 0       0xfe4ff800 - 0xfe4fffff (0x800) MX[B]E
        [11] -1 0       0xfe9fb700 - 0xfe9fb7ff (0x100) MX[B]E
        [12] -1 0       0xfe9fb800 - 0xfe9fbfff (0x800) MX[B]E
        [13] -1 0       0xfed1c000 - 0xfed1c3ff (0x400) MX[B]E
        [14] -1 0       0xfe9fc000 - 0xfe9fffff (0x4000) MX[B]E
        [15] -1 0       0xfed1c400 - 0xfed1c7ff (0x400) MX[B]E
        [16] -1 0       0xfeb00000 - 0xfebfffff (0x100000) MX[B](B)
        [17] -1 0       0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
        [18] -1 0       0xfea00000 - 0xfeafffff (0x100000) MX[B](B)
        [19] -1 0       0x0000ffff - 0x0000ffff (0x1) IX[B]
        [20] -1 0       0x00000000 - 0x000000ff (0x100) IX[B]
        [21] -1 0       0x000010c0 - 0x000010ff (0x40) IX[B]E
        [22] -1 0       0x00006ee0 - 0x00006eff (0x20) IX[B]E
        [23] -1 0       0x00006ec8 - 0x00006ecf (0x8) IX[B]E
        [24] -1 0       0x00006ec0 - 0x00006ec7 (0x8) IX[B]E
        [25] -1 0       0x00006eb8 - 0x00006ebf (0x8) IX[B]E
        [26] -1 0       0x00006eb0 - 0x00006eb7 (0x8) IX[B]E
        [27] -1 0       0x00006fa0 - 0x00006fbf (0x20) IX[B]E
        [28] -1 0       0x00000374 - 0x00000377 (0x4) IX[B]E
        [29] -1 0       0x00000170 - 0x0000017f (0x10) IX[B]E
        [30] -1 0       0x000003f4 - 0x000003f7 (0x4) IX[B]E
        [31] -1 0       0x000001f0 - 0x000001ff (0x10) IX[B]E
        [32] -1 0       0x00006f40 - 0x00006f5f (0x20) IX[B]E
        [33] -1 0       0x00006f60 - 0x00006f7f (0x20) IX[B]E
        [34] -1 0       0x00006f80 - 0x00006f9f (0x20) IX[B]E
        [35] -1 0       0x00006f00 - 0x00006f1f (0x20) IX[B]E
        [36] -1 0       0x00006f20 - 0x00006f3f (0x20) IX[B]E
        [37] -1 0       0x0000eff8 - 0x0000efff (0x8) IX[B](B)
(II) resource ranges after probing:
        [0] -1  0       0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
        [1] -1  0       0x000f0000 - 0x000fffff (0x10000) MX[B]
        [2] -1  0       0x000c0000 - 0x000effff (0x30000) MX[B]
        [3] -1  0       0x00000000 - 0x0009ffff (0xa0000) MX[B]
        [4] -1  0       0xfe8ff000 - 0xfe8fffff (0x1000) MX[B]E
        [5] -1  0       0xfe5f0000 - 0xfe5fffff (0x10000) MX[B]E
        [6] -1  0       0xfe4ff700 - 0xfe4ff7ff (0x100) MX[B]E
        [7] -1  0       0xfe4ff600 - 0xfe4ff6ff (0x100) MX[B]E
        [8] -1  0       0xfe4ff500 - 0xfe4ff5ff (0x100) MX[B]E
        [9] -1  0       0xfe4ff400 - 0xfe4ff4ff (0x100) MX[B]E
        [10] -1 0       0xfe4ff800 - 0xfe4fffff (0x800) MX[B]E
        [11] -1 0       0xfe9fb700 - 0xfe9fb7ff (0x100) MX[B]E
        [12] -1 0       0xfe9fb800 - 0xfe9fbfff (0x800) MX[B]E
        [13] -1 0       0xfed1c000 - 0xfed1c3ff (0x400) MX[B]E
        [14] -1 0       0xfe9fc000 - 0xfe9fffff (0x4000) MX[B]E
        [15] -1 0       0xfed1c400 - 0xfed1c7ff (0x400) MX[B]E
        [16] -1 0       0xfeb00000 - 0xfebfffff (0x100000) MX[B](B)
        [17] -1 0       0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
        [18] -1 0       0xfea00000 - 0xfeafffff (0x100000) MX[B](B)
        [19] 0  0       0x000a0000 - 0x000affff (0x10000) MS[B]
        [20] 0  0       0x000b0000 - 0x000b7fff (0x8000) MS[B]
        [21] 0  0       0x000b8000 - 0x000bffff (0x8000) MS[B]
        [22] -1 0       0x0000ffff - 0x0000ffff (0x1) IX[B]
        [23] -1 0       0x00000000 - 0x000000ff (0x100) IX[B]
        [24] -1 0       0x000010c0 - 0x000010ff (0x40) IX[B]E
        [25] -1 0       0x00006ee0 - 0x00006eff (0x20) IX[B]E
        [26] -1 0       0x00006ec8 - 0x00006ecf (0x8) IX[B]E
        [27] -1 0       0x00006ec0 - 0x00006ec7 (0x8) IX[B]E
        [28] -1 0       0x00006eb8 - 0x00006ebf (0x8) IX[B]E
        [29] -1 0       0x00006eb0 - 0x00006eb7 (0x8) IX[B]E
        [30] -1 0       0x00006fa0 - 0x00006fbf (0x20) IX[B]E
        [31] -1 0       0x00000374 - 0x00000377 (0x4) IX[B]E
        [32] -1 0       0x00000170 - 0x0000017f (0x10) IX[B]E
        [33] -1 0       0x000003f4 - 0x000003f7 (0x4) IX[B]E
        [34] -1 0       0x000001f0 - 0x000001ff (0x10) IX[B]E
        [35] -1 0       0x00006f40 - 0x00006f5f (0x20) IX[B]E
        [36] -1 0       0x00006f60 - 0x00006f7f (0x20) IX[B]E
        [37] -1 0       0x00006f80 - 0x00006f9f (0x20) IX[B]E
        [38] -1 0       0x00006f00 - 0x00006f1f (0x20) IX[B]E
        [39] -1 0       0x00006f20 - 0x00006f3f (0x20) IX[B]E
        [40] -1 0       0x0000eff8 - 0x0000efff (0x8) IX[B](B)
        [41] 0  0       0x000003b0 - 0x000003bb (0xc) IS[B]
        [42] 0  0       0x000003c0 - 0x000003df (0x20) IS[B]
(II) Setting vga for screen 0.
(II) Loading sub module "int10"
(II) LoadModule: "int10"
(II) Loading /usr/pkg/lib/xorg/modules//libint10.so
(II) Module int10: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.0.0
        ABI class: X.Org Video Driver, version 1.2
(II) Loading sub module "vbe"
(II) LoadModule: "vbe"
(II) Loading /usr/pkg/lib/xorg/modules//libvbe.so
(II) Module vbe: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.1.0
        ABI class: X.Org Video Driver, version 1.2
(II) Loading sub module "vgahw"
(II) LoadModule: "vgahw"
(II) Loading /usr/pkg/lib/xorg/modules//libvgahw.so
(II) Module vgahw: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 0.1.0
        ABI class: X.Org Video Driver, version 1.2
(**) intel(0): Depth 24, (--) framebuffer bpp 32
(==) intel(0): RGB weight 888
(==) intel(0): Default visual is TrueColor
(**) intel(0): Option "AccelMethod" "EXA"
(**) intel(0): Option "AperTexSize" "65536"
(II) intel(0): Integrated Graphics Chipset: Intel(R) 965GM
(--) intel(0): Chipset: "965GM"
(--) intel(0): Linear framebuffer at 0xE0000000
(--) intel(0): IO registers at addr 0xFEA00000
(WW) intel(0): remove MTRR fea00000 - fea80000
(WW) intel(0): remove MTRR fea80000 - feb00000
(II) intel(0): 2 display pipes available.
(**) intel(0): Using EXA for acceleration
(--) intel(0): Will try to allocate texture pool for old Mesa 3D driver.
(**) intel(0): Will try to reserve 65536 kiB of AGP aperture space
        for the DRM memory manager.
(II) Loading sub module "ddc"
(II) LoadModule: "ddc"(II) Module already built-in
(II) Loading sub module "i2c"
(II) LoadModule: "i2c"(II) Module already built-in
(II) intel(0): Output VGA using monitor section Monitor0
(II) intel(0): I2C bus "CRTDDC_A" initialized.
(II) intel(0): Output LVDS has no monitor section
(II) intel(0): I2C bus "LVDSDDC_C" initialized.
(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
(II) intel(0): EDID for output LVDS
(II) intel(0): Manufacturer: LPL  Model: 0  Serial#: 0
(II) intel(0): Year: 2007  Week: 0
(II) intel(0): EDID Version: 1.3
(II) intel(0): Digital Display Input
(II) intel(0): Max H-Image Size [cm]: horiz.: 29  vert.: 18
(II) intel(0): Gamma: 2.20
(II) intel(0): No DPMS capabilities specified; RGB/Color Display
(II) intel(0): First detailed timing is preferred mode
(II) intel(0): redX: 0.592 redY: 0.345   greenX: 0.333 greenY: 0.541
(II) intel(0): blueX: 0.160 blueY: 0.149   whiteX: 0.312 whiteY: 0.329
(II) intel(0): Manufacturer's mask: 0
(II) intel(0): Supported additional Video Mode:
(II) intel(0): clock: 71.5 MHz   Image Size:  286 x 179 mm
(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 
h_border: 0
(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 827 
v_border: 0
(II) intel(0):  UN864133WX1
(II) intel(0):  6BLk?²ÿ
(II) intel(0): EDID (in hex):
(II) intel(0):  00ffffffffffff00320c000000000000
(II) intel(0):  00110103801d12780a96119758558a29
(II) intel(0):  26505400000001010101010101010101
(II) intel(0):  010101010101ee1b00a050201b303020
(II) intel(0):  36001eb3100000180000000000000000
(II) intel(0):  00000000000000000000000000fe0055
(II) intel(0):  4e383634063133335758310a000000fe
(II) intel(0):  001f36424c6b8ab2ff01010a2020008a
(II) intel(0): EDID vendor "LPL", prod id 0
(II) Loading sub module "int10"
(II) LoadModule: "int10"
(II) Reloading /usr/pkg/lib/xorg/modules//libint10.so
(II) intel(0): initializing int10
(WW) intel(0): remove MTRR a0000 - c0000
(WW) intel(0): remove MTRR c0000 - 100000
(WW) intel(0): Bad V_BIOS checksum
(II) intel(0): Primary V_BIOS segment is: 0xc000
(WW) intel(0): remove MTRR 0 - 1000
(II) intel(0): VESA BIOS detected
(II) intel(0): VESA VBE Version 3.0
(II) intel(0): VESA VBE Total Mem: 7616 kB
(II) intel(0): VESA VBE OEM: Intel(r)GM965/PM965/GL960 Graphics Chip 
Accelerated VGA BIOS
(II) intel(0): VESA VBE OEM Software Rev: 1.0
(II) intel(0): VESA VBE OEM Vendor: Intel Corporation
(II) intel(0): VESA VBE OEM Product: Intel(r)GM965/PM965/GL960 Graphics 
Controller
(II) intel(0): VESA VBE OEM Product Rev: Hardware Version 0.0
(WW) intel(0): remove MTRR 0 - 1000
(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered 
at address 0x70.
(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
(II) intel(0): Output TMDS-1 has no monitor section
(II) intel(0): SDVO device VID/DID: 04:AE.00, clock range 25.0MHz - 165.0MHz, 
input 1: Y, input 2: N, output 1: Y, output 2: N
(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered 
at address 0x72.
(II) intel(0): No SDVO device found on SDVOC
(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" removed.
(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" removed.
(II) intel(0): Output TV has no monitor section
(II) intel(0): Current clock rate multiplier: 1
(WW) intel(0): remove MTRR a0000 - b0000
(II) intel(0): Output VGA disconnected
(II) intel(0): EDID for output VGA
(II) intel(0): Output LVDS connected
(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
(II) intel(0): EDID for output LVDS
(II) intel(0): Manufacturer: LPL  Model: 0  Serial#: 0
(II) intel(0): Year: 2007  Week: 0
(II) intel(0): EDID Version: 1.3
(II) intel(0): Digital Display Input
(II) intel(0): Max H-Image Size [cm]: horiz.: 29  vert.: 18
(II) intel(0): Gamma: 2.20
(II) intel(0): No DPMS capabilities specified; RGB/Color Display
(II) intel(0): First detailed timing is preferred mode
(II) intel(0): redX: 0.592 redY: 0.345   greenX: 0.333 greenY: 0.541
(II) intel(0): blueX: 0.160 blueY: 0.149   whiteX: 0.312 whiteY: 0.329
(II) intel(0): Manufacturer's mask: 0
(II) intel(0): Supported additional Video Mode:
(II) intel(0): clock: 71.5 MHz   Image Size:  286 x 179 mm
(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 
h_border: 0
(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 827 
v_border: 0
(II) intel(0):  UN864133WX1
(II) intel(0):  6BLk?²ÿ
(II) intel(0): EDID (in hex):
(II) intel(0):  00ffffffffffff00320c000000000000
(II) intel(0):  00110103801d12780a96119758558a29
(II) intel(0):  26505400000001010101010101010101
(II) intel(0):  010101010101ee1b00a050201b303020
(II) intel(0):  36001eb3100000180000000000000000
(II) intel(0):  00000000000000000000000000fe0055
(II) intel(0):  4e383634063133335758310a000000fe
(II) intel(0):  001f36424c6b8ab2ff01010a2020008a
(II) intel(0): EDID vendor "LPL", prod id 0
(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
(II) intel(0): Not using default mode "1280x960" (hsync out of range)
(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1792x1344" (hsync out of range)
(II) intel(0): Not using default mode "1792x1344" (vrefresh out of range)
(II) intel(0): Not using default mode "1856x1392" (hsync out of range)
(II) intel(0): Not using default mode "1856x1392" (vrefresh out of range)
(II) intel(0): Not using default mode "1920x1440" (hsync out of range)
(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
(II) intel(0): Not using default mode "1152x768" (vrefresh out of range)
(II) intel(0): Not using default mode "1400x1050" (hsync out of range)
(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1024" (hsync out of range)
(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
(II) intel(0): Not using default mode "2048x1536" (hsync out of range)
(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
(II) intel(0): Printing probed modes for output LVDS
(II) intel(0): Modeline "1280x800"x60.0   71.50  1280 1328 1360 1440  800 803 
809 827 -hsync -vsync (49.7 kHz)
(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 
777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 
628 +hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 
525 -hsync -vsync (31.5 kHz)
(II) intel(0): Output TMDS-1 disconnected
(II) intel(0): EDID for output TMDS-1
(II) intel(0): Output TV connected
(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
(II) intel(0): Not using default mode "640x480" (bad mode 
clock/interlace/doublescan)
(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (bad mode 
clock/interlace/doublescan)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "1024x768" (bad mode 
clock/interlace/doublescan)
(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
(II) intel(0): Not using default mode "1280x960" (hsync out of range)
(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1792x1344" (hsync out of range)
(II) intel(0): Not using default mode "1792x1344" (vrefresh out of range)
(II) intel(0): Not using default mode "1856x1392" (hsync out of range)
(II) intel(0): Not using default mode "1856x1392" (vrefresh out of range)
(II) intel(0): Not using default mode "1920x1440" (hsync out of range)
(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
(II) intel(0): Not using default mode "1152x768" (vrefresh out of range)
(II) intel(0): Not using default mode "1400x1050" (hsync out of range)
(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1024" (hsync out of range)
(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
(II) intel(0): Not using default mode "2048x1536" (hsync out of range)
(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
(II) intel(0): Printing probed modes for output TV
(II) intel(0): Modeline "1024x768"x30.0   26.89  1024 1025 1088 1120  768 769 
800 801 (24.0 kHz)
(II) intel(0): Modeline "800x600"x30.0   17.00  800 801 864 896  600 601 632 
633 (19.0 kHz)
(II) intel(0): Modeline "848x480"x30.0   14.51  848 849 912 944  480 481 512 
513 (15.4 kHz)
(II) intel(0): Modeline "640x480"x30.0   11.31  640 641 704 736  480 481 512 
513 (15.4 kHz)
(II) intel(0): Output VGA disconnected
(II) intel(0): Output LVDS connected
(II) intel(0): Output TMDS-1 disconnected
(II) intel(0): Output TV connected
(II) intel(0): Output LVDS using initial mode 1280x800
(II) intel(0): Output TV using initial mode 1024x768
(WW) intel(0): remove MTRR a0000 - b0000
(II) intel(0): Monitoring connected displays enabled
(II) intel(0): detected 512 kB GTT.
(II) intel(0): detected 7676 kB stolen memory.
(==) intel(0): video overlay key set to 0x101fe
(==) intel(0): Will not try to enable page flipping
(==) intel(0): Triple buffering disabled
(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
(==) intel(0): DPI set to (75, 75)
(II) Loading sub module "fb"
(II) LoadModule: "fb"
(II) Loading /usr/pkg/lib/xorg/modules//libfb.so
(II) Module fb: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.0.0
        ABI class: X.Org ANSI C Emulation, version 0.3
(II) Loading sub module "exa"
(II) LoadModule: "exa"
(II) Loading /usr/pkg/lib/xorg/modules//libexa.so
(II) Module exa: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 2.1.0
        ABI class: X.Org Video Driver, version 1.2
(II) Loading sub module "ramdac"
(II) LoadModule: "ramdac"(II) Module already built-in
(II) intel(0): Comparing regs from server start up to After PreInit
(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 
0x00000400
(==) Depth 24 pixmap format is 32 bpp
(II) do I need RAC?  No, I don't.
(II) resource ranges after preInit:
        [0] 0   0       0xe0000000 - 0xefffffff (0x10000000) MS[B]
        [1] 0   0       0xfea00000 - 0xfeafffff (0x100000) MS[B]
        [2] -1  0       0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
        [3] -1  0       0x000f0000 - 0x000fffff (0x10000) MX[B]
        [4] -1  0       0x000c0000 - 0x000effff (0x30000) MX[B]
        [5] -1  0       0x00000000 - 0x0009ffff (0xa0000) MX[B]
        [6] -1  0       0xfe8ff000 - 0xfe8fffff (0x1000) MX[B]E
        [7] -1  0       0xfe5f0000 - 0xfe5fffff (0x10000) MX[B]E
        [8] -1  0       0xfe4ff700 - 0xfe4ff7ff (0x100) MX[B]E
        [9] -1  0       0xfe4ff600 - 0xfe4ff6ff (0x100) MX[B]E
        [10] -1 0       0xfe4ff500 - 0xfe4ff5ff (0x100) MX[B]E
        [11] -1 0       0xfe4ff400 - 0xfe4ff4ff (0x100) MX[B]E
        [12] -1 0       0xfe4ff800 - 0xfe4fffff (0x800) MX[B]E
        [13] -1 0       0xfe9fb700 - 0xfe9fb7ff (0x100) MX[B]E
        [14] -1 0       0xfe9fb800 - 0xfe9fbfff (0x800) MX[B]E
        [15] -1 0       0xfed1c000 - 0xfed1c3ff (0x400) MX[B]E
        [16] -1 0       0xfe9fc000 - 0xfe9fffff (0x4000) MX[B]E
        [17] -1 0       0xfed1c400 - 0xfed1c7ff (0x400) MX[B]E
        [18] -1 0       0xfeb00000 - 0xfebfffff (0x100000) MX[B](B)
        [19] -1 0       0xe0000000 - 0xefffffff (0x10000000) MX[B](B)
        [20] -1 0       0xfea00000 - 0xfeafffff (0x100000) MX[B](B)
        [21] 0  0       0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
        [22] 0  0       0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
        [23] 0  0       0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
        [24] 0  0       0x0000eff8 - 0x0000efff (0x8) IS[B]
        [25] -1 0       0x0000ffff - 0x0000ffff (0x1) IX[B]
        [26] -1 0       0x00000000 - 0x000000ff (0x100) IX[B]
        [27] -1 0       0x000010c0 - 0x000010ff (0x40) IX[B]E
        [28] -1 0       0x00006ee0 - 0x00006eff (0x20) IX[B]E
        [29] -1 0       0x00006ec8 - 0x00006ecf (0x8) IX[B]E
        [30] -1 0       0x00006ec0 - 0x00006ec7 (0x8) IX[B]E
        [31] -1 0       0x00006eb8 - 0x00006ebf (0x8) IX[B]E
        [32] -1 0       0x00006eb0 - 0x00006eb7 (0x8) IX[B]E
        [33] -1 0       0x00006fa0 - 0x00006fbf (0x20) IX[B]E
        [34] -1 0       0x00000374 - 0x00000377 (0x4) IX[B]E
        [35] -1 0       0x00000170 - 0x0000017f (0x10) IX[B]E
        [36] -1 0       0x000003f4 - 0x000003f7 (0x4) IX[B]E
        [37] -1 0       0x000001f0 - 0x000001ff (0x10) IX[B]E
        [38] -1 0       0x00006f40 - 0x00006f5f (0x20) IX[B]E
        [39] -1 0       0x00006f60 - 0x00006f7f (0x20) IX[B]E
        [40] -1 0       0x00006f80 - 0x00006f9f (0x20) IX[B]E
        [41] -1 0       0x00006f00 - 0x00006f1f (0x20) IX[B]E
        [42] -1 0       0x00006f20 - 0x00006f3f (0x20) IX[B]E
        [43] -1 0       0x0000eff8 - 0x0000efff (0x8) IX[B](B)
        [44] 0  0       0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
        [45] 0  0       0x000003c0 - 0x000003df (0x20) IS[B](OprU)
(II) intel(0): Kernel reported 1006592 total, 0 used
(II) intel(0): I830CheckAvailableMemory: 4026368 kB available
(==) intel(0): VideoRam: 262144 KB
(WW) intel(0): remove MTRR fea00000 - fea80000
(WW) intel(0): remove MTRR fea80000 - feb00000
(II) intel(0): Attempting memory allocation with tiled buffers and 
               large DRI memory manager reservation:
(II) intel(0): Success.
(II) intel(0): Memory allocation layout:
(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
(II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB)
(II) intel(0): 0x00032000-0x00041fff: exa G965 state buffer (64 kB)
(II) intel(0): 0x00050000-0x0068ffff: front buffer (6400 kB)
(II) intel(0): 0x00690000-0x02147fff: exa offscreen (27360 kB)
(II) intel(0): 0x0077f000:            end of stolen memory
(II) intel(0): 0x02148000-0x02787fff: back buffer (6400 kB)
(II) intel(0): 0x02788000-0x02dc7fff: depth buffer (6400 kB)
(II) intel(0): 0x02dc8000-0x04dc7fff: textures (32768 kB)
(II) intel(0): 0x10000000:            end of aperture
(II) intel(0): front buffer is not tiled
(II) intel(0): back buffer is tiled
(II) intel(0): depth buffer is tiled
drmOpenDevice: node name is /dev/dri/card0
drmOpenDevice: open result is -1, (Device not configured)
drmOpenDevice: open result is -1, (Device not configured)
drmOpenDevice: Open failed
drmOpenDevice: node name is /dev/dri/card0
drmOpenDevice: open result is -1, (Device not configured)
drmOpenDevice: open result is -1, (Device not configured)
drmOpenDevice: Open failed
[drm] failed to load kernel module "i915"
(II) intel(0): [drm] drmOpen failed
(EE) intel(0): [dri] DRIScreenInit failed. Disabling DRI.
(II) intel(0): Page Flipping disabled
(WW) intel(0): remove MTRR fea00000 - fea80000
(WW) intel(0): remove MTRR fea80000 - feb00000
(WW) intel(0): set MTRR e0000000 - f0000000
(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
(WW) intel(0): remove MTRR a0000 - b0000
(**) intel(0): Option "MigrationHeuristic" "greedy"
(II) EXA(0): Offscreen pixmap area of 28016640 bytes
(II) EXA(0): Driver registered support for the following operations:
(II)         Solid
(II)         Copy
(II)         Composite (RENDER acceleration)
(==) intel(0): Backing store disabled
(==) intel(0): Silken mouse enabled
(II) intel(0): Initializing HW Cursor
(II) intel(0): Current clock rate multiplier: 1
(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919)
(II) intel(0): Output configuration:
(II) intel(0):   Pipe A is on
(II) intel(0):   Display plane A is now enabled and connected to pipe A.
(II) intel(0):   Pipe B is on
(II) intel(0):   Display plane B is now enabled and connected to pipe B.
(II) intel(0):   Output VGA is connected to pipe none
(II) intel(0):   Output LVDS is connected to pipe B
(II) intel(0):   Output TMDS-1 is connected to pipe none
(II) intel(0):   Output TV is connected to pipe A
(II) intel(0): Set up textured video
(II) intel(0): direct rendering: Failed
(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
(WW) intel(0): Option "DisplayInfo" is not used
(WW) intel(0): Option "AllowGLXWithComposite" is not used
(WW) intel(0): Option "AddARGBGLXVisuals" is not used
(WW) intel(0): Option "AddRGBGLXVisuals" is not used
(--) RandR disabled
(II) Initializing built-in extension MIT-SHM
(II) Initializing built-in extension XInputExtension
(II) Initializing built-in extension XTEST
(II) Initializing built-in extension XKEYBOARD
(II) Initializing built-in extension XC-APPGROUP
(II) Initializing built-in extension XAccessControlExtension
(II) Initializing built-in extension SECURITY
(II) Initializing built-in extension XINERAMA
(II) Initializing built-in extension XFIXES
(II) Initializing built-in extension XFree86-Bigfont
(II) Initializing built-in extension RENDER
(II) Initializing built-in extension RANDR
(II) Initializing built-in extension COMPOSITE
(II) Initializing built-in extension DAMAGE
(II) Initializing built-in extension XEVIE
(EE) AIGLX: Screen 0 is not DRI capable
(II) Loading local sub module "GLcore"
(II) LoadModule: "GLcore"
(II) Loading /usr/pkg/lib/xorg/modules/extensions//libGLcore.so
(II) Module GLcore: vendor="X.Org Foundation"
        compiled for 1.3.0, module version = 1.0.0
        ABI class: X.Org Server Extension, version 0.3
(II) GLX: Initialized MESA-PROXY GL provider for screen 0
(II) intel(0): Setting screen physical size to 286 x 179
(**) Option "Protocol" "wsmouse"
(**) Mouse0: Protocol: wsmouse
(**) Option "CorePointer"
(**) Mouse0: Core Pointer
(**) Option "Device" "/dev/wsmouse"
(==) Mouse0: Emulate3Buttons, Emulate3Timeout: 50
(**) Option "ZAxisMapping" "4 5 6 7"
(**) Mouse0: ZAxisMapping: buttons 4, 5, 6 and 7
(**) Mouse0: Buttons: 11
(**) Option "CoreKeyboard"
(**) Keyboard0: Core Keyboard
(**) Option "Protocol" "standard"
(**) Keyboard0: Protocol: standard
(**) Option "AutoRepeat" "500 30"
(**) Option "XkbRules" "xorg"
(**) Keyboard0: XkbRules: "xorg"
(**) Option "XkbModel" "pc105"
(**) Keyboard0: XkbModel: "pc105"
(**) Option "XkbLayout" "fr"
(**) Keyboard0: XkbLayout: "fr"
(**) Option "CustomKeycodes" "off"
(**) Keyboard0: CustomKeycodes disabled
(II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD)
(II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE)
(II) intel(0): xf86UnbindGARTMemory: unbind key 0

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