Subject: Re: timecounters using broken TSC - PC-engines WRAP time problem
To: None <>
From: Joerg Sonnenberger <>
List: tech-kern
Date: 11/29/2007 16:35:19
On Thu, Nov 29, 2007 at 05:00:21PM +0100, theo borm wrote:
>> Can you try boot -d and "w tsc_is_broken=1"?
> booting hd0a:netbsd (howto 0x40)
> 1824524+54500+194292 [150528+141221]=0x2429f4
> Stopped at      netbsd:cpu_Debugger+0x4:        popl    %ebp
> db> w tsc_is_broken=1
> Nothing written.

Bah, space instead of =.

> Is this tsc_is_broken documented? is there a kernel compilation option too?

Not ATM. But I am considering what we have to do to detect such cases
correctly and disable the TSC.

>> It is not so much a question of accuracy, but rather that the i8254
>> timer is extremely slow on most systems.
> At > 1Mhz I wouldn't call it /extremely/ slow ;-)

Keep in mind that it is using ISA bus cycles on most systems.
It is not a question of the resolution, but the time it takes to access
the counter.