ITOH Yasufumi wrote:
> In article <etu7iu$qpk$1@serpens.de>
> mlelstv@serpens.de writes:
> 
>>itohy@NetBSD.org (ITOH Yasufumi) writes:
>>
>>>- volatiles in DMA structure, since it should not be needed
>>>  with proper bus_dma_sync(9)s
>>
>>Can you explain?
> 
> Sure.
> 
> Our HCI drivers didn't have bus_dmamap_sync(9) at all.
> (Yeah, bus_dma_sync is a typo of bus_dmamap_sync.)
> I wonder why it worked.
> 
> bus_dmamap_sync() commonly has two functions:
>  1. buffer bouncing, and
>  2. providing proper barrier to ensure the data will not be cached.
> 
> Declaring as "volatile" may have similar function as 2. and
> may make it work on some platforms.
> It is, however, useless if bus_dmamap_sync()s are present.
> 
> Does this satisfy your question?

There are two types of caching that can happen. Cpu cache, which you get 
at with bus_dmamap_sync(), and compiler optimizations, which can cause 
caching of data in registers, which volatile gets at.
If something is declared volatile, the compiler is never allowed to 
optimize the access to that register. Neither by keeping it in a 
register, nor by reordering or optimize access to the variable. Each 
read/write/whatever must be performed in the same way, and in the same 
order as it is written in the source.

	Johnny