Subject: Re: Patches for EST and SMP
To: <>
From: David Laight <david@l8s.co.uk>
List: tech-kern
Date: 03/17/2007 12:57:09
On Sat, Mar 17, 2007 at 08:39:26AM -0400, der Mouse wrote:
> > * Implement two new IPI handlers: IPI_READ_MSR and IPI_WRITE_MSR.
> > * To read or write a MSR in all CPUs (x86_broadcast_ipi(IPI_READ_MSR)).
> > * Provide two functions for the drivers to read and write MSRs with IPIs, 
> > passing a struct pointer:
> >   
> > struct msr_cpu_broadcast {
> > 	int msr_type;	/* MSR type, e.g MSR_PERF_CTL, MSR_THERM_CONTROL... */
> > 	uint64_t msr_value;	/* MSR value passed to the write function */
> > };
> 
> What's an MSR?  Do all, or at least most, arches have them?  If not,
> why is this on tech-kern rather than the appropriate port-* list(s)?

Machine Specific Register on i386 and amd64.
Nothing specifically to do with MP.

	David

-- 
David Laight: david@l8s.co.uk