> * Implement two new IPI handlers: IPI_READ_MSR and IPI_WRITE_MSR.
> * To read or write a MSR in all CPUs (x86_broadcast_ipi(IPI_READ_MSR)).
> * Provide two functions for the drivers to read and write MSRs with IPIs, 
> passing a struct pointer:
>   
> struct msr_cpu_broadcast {
> 	int msr_type;	/* MSR type, e.g MSR_PERF_CTL, MSR_THERM_CONTROL... */
> 	uint64_t msr_value;	/* MSR value passed to the write function */
> };

What's an MSR?  Do all, or at least most, arches have them?  If not,
why is this on tech-kern rather than the appropriate port-* list(s)?
(I've never heard of them that I can recall, but I know only a
half-dozen arches, and only about two well enough that I'd expect to
know such details of inter-processor stuff.)

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