Subject: Re: Interrupt, interrupt threads, continuations, and kernel lwps
To: Jason Thorpe <email@example.com>
From: Andrew Doran <firstname.lastname@example.org>
Date: 02/21/2007 22:59:29
On Wed, Feb 21, 2007 at 10:05:00AM -0800, Jason Thorpe wrote:
> On Feb 21, 2007, at 2:09 AM, Andrew Doran wrote:
> >Conversely, the changes I have to handle
> >interrupts using LWPs add 29 instructions to a typical interrupt
> >chain on
> >x86, to swap stack and curlwp. It works, and it's a solution that
> >can just
> >be "dropped in".
> The problem is I don't think it CAN be "dropped in" on a platform like
> VAX, m68k,
We mentioned vax & m68k before..
> or SPARC. It's easy on x86 because of how simple its interrupt model is.
> But I don't think that's true on platforms that have processor-defined
> interrupt levels and auto-vectored interrupts.
On sparc, the priority level is controlled by writing to a register on the
processor, and it's well defined - piece of cake. On x86 there is no way to
do that (at least, not one that will work on PCs in general). We end up
emulating the priority levels in software, because you can have different
sources, different priorities sharing lines. It's a pain! :-)