"Thomas E. Spanjaard" <tgen@netphreax.net> writes:

> Bucky Katz wrote:
>> Thor Lancelot Simon <tls@rek.tjls.com> writes:
>>>2) Either cause them to perform acceptably for your application, or else
>>>   endeavor to get M:N back in a supported state for uniprocessors.
>> It has to be the later. The context switch overhead of 1:1 on ARM will
>> cause a severe performance degradation.
>
> Doesn't OMAP support the v4/v5 hyped fast address space switching?
>

I dunno. I don't recognize it by that name and can't find any term
like that in the processor TRM.

If you mean (and I suspect you do) The "Fast Context Switch Extention"
FCSE, then yes the OMAP processors we are currently using support it.

See
http://www.ertos.nicta.com.au/publications/papers/vanSchaik_Heiser_07.pdf
for a description of FCSE (on page 3) the upshot of which is that
implementing FCSE in NetBSD would require a bunch of work outside of
the OMAP port to support the architectural restrictions.