Subject: Re: bce(4) and memory > 1GB problem
To: None <tech-kern@NetBSD.org>
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
List: tech-kern
Date: 01/11/2007 00:24:04
bouyer@antioche.eu.org wrote:

> > >either way, this will require a bunch of work for each platform to do
> > >the right thing.  the patch proposed seems to be most of what we need
> > >for it on x86 so i see little harm in commiting it.
> > 
> > ...except to note that the API will almost certainly change.
> 
> Yes. Maybe it should be better to add this as a parameter to
> bus_dmamap_create(), and compute the proper _dm_bounce_thresh at this
> time.  But this is a big change in the bus_dma API, and require
> changing a lot of files, unless we keep bus_dmamap_create() as is and
> intruduce a new function with this extra parameter.

bus_dmamem_alloc(9) should also be changed to allocate
DMA safe memory for such devices.

On some bus controller, it could map any physical memory into
<1GB range on DMA address space in bus_dmamap_load(9) and
no need to handle it by bounce buffer in bus_dmamap_sync(9).

Looks too complicated to design proper MI APIs...
---
Izumi Tsutsui