It occurred to me that Thomas E. Spanjaard wrote in gmane.os.netbsd.devel.kernel:
> This CPU doesn't have Enhanced Speedstep Technology (est), just 
> Speedstep. I reckon the BIOS can control the speed based on ACPI or APM 
> events.

Another option would be enabling

ichlpcib* at pci? dev ? function ?      # Intel ICH PCI-ISA w/ watchdog and
                                        # SpeedStep support

in the kernel config (it is disabled by default). This enabled SpeedStep
(Not -enhanced) on my ThinkPad A31 (which has a p4-m). Sadly, the interface to 
"normal" speedstep is rather different than the interface to its enhanced 
sibling.