On Thu, 31 Aug 2006 10:22:09 +0200
Juan RP <juan@xtrarom.org> wrote:

> Seems to match the lowest entry:
> 
>  cpu0: Enhanced SpeedStep (1340 mV) 1800 MHz
> cpu0: unknown Enhanced SpeedStep CPU.
> est_init: bus_clock = 10000
> est_init: idlo = 0x612
> est_init: lo   988 mV,  600 MHz
> est_init: raw   18   ,    6    
> est_init: idhi = 0x1228
> est_init: hi  1340 mV, 1800 MHz
> est_init: raw   40   ,   18    
> est_init: cur  = 0x1228
> est_init: fake entry 0: 1340 mV, 1800 MHz  MSR*100 mV = 1800 freq = 4000
> est_init: fake entry 1: 1324 mV, 1700 MHz  MSR*100 mV = 1700 freq = 3816
> est_init: fake entry 2: 1292 mV, 1600 MHz  MSR*100 mV = 1600 freq = 3632
> est_init: fake entry 3: 1260 mV, 1500 MHz  MSR*100 mV = 1500 freq = 3448
> est_init: fake entry 4: 1228 mV, 1400 MHz  MSR*100 mV = 1400 freq = 3264
> est_init: fake entry 5: 1196 mV, 1300 MHz  MSR*100 mV = 1300 freq = 3080
> est_init: fake entry 6: 1164 mV, 1200 MHz  MSR*100 mV = 1200 freq = 2896
> est_init: fake entry 7: 1148 mV, 1100 MHz  MSR*100 mV = 1100 freq = 2712
> est_init: fake entry 8: 1116 mV, 1000 MHz  MSR*100 mV = 1000 freq = 2528
> est_init: fake entry 9: 1084 mV,  900 MHz  MSR*100 mV =  900 freq = 2344
> est_init: fake entry 10: 1052 mV,  800 MHz  MSR*100 mV =  800 freq = 2160
> est_init: fake entry 11: 1020 mV,  700 MHz  MSR*100 mV =  700 freq = 1976
> est_init: fake entry 12:  988 mV,  600 MHz  MSR*100 mV =  600 freq = 1792

Two testers reported that the code seems to detect mV and MHz correctly
and openssl speed results are good.

CPUs tested now:

Pentium M 745 1.8GHz
Pentium M 760 2.13GHz
Pentium M 765 2.0GHz
Pentium M (Banias) 1.6GHz
Core Duo T2400 1.83GHz