Subject: Re: Cardbus BAR Mapping questions/PCI differences
To: None <email@example.com>
From: Phil Quinton <firstname.lastname@example.org>
Date: 03/15/2006 08:03:32
In article <44170BA8.email@example.com>, firstname.lastname@example.org
> This a bit in the mapping register that determines whether the mapping
> is for IO space or memory space.
> I'm surprised that the "ath" driver has to know about this detail though
> -- it should be handled automatically as part of Cardbus_mapreg_map.
That's the thing, ALL the drivers in dev/cardbus do it.. After they
Cardbus_mapreg_map, they take the bus_addr_t * returned from the map
command.. OR it with the memory type MEM or IO and then
Cardbus_conf_write it back.
I Don't understand why.
> > The reason I ask is the satalink driver maps BAR5 for it's chipset and
> > BAR4 is mapped later on for the IDE portion and the drivers in
> > drv/cardbus only seem to need to map one BAR.
> Which bars to map, and how many, are necessarily device specific.
That's what I figured. I've managed to port almost all the code, I'm
just confused with this mapping/OR the address/write it back thing.
Thanks for you help.