On Mon, Mar 06, 2006 at 09:41:00AM +0100, pavel.cahyna@st.mff.cuni.cz wrote:
> On Mon, Mar 06, 2006 at 07:52:17AM +0100, Olivier Cherrier wrote:
> > 	Hello,
> > 
> > This patch adds the Moxa CP104 serial card to the puc(4) driver.
> > Tested on i386 3.0.
> 
> Could you please send the output of "pcictl dump" for your card?


Here is it:
 

PCI configuration registers:
  Common header:
    0x00: 0x10411393 0x02000041 0x07000200 0x00002008

    Vendor Name: Moxa (0x1393)
    Device Name: CP-104UL (0x1041)
    Command register: 0x0041
      I/O space accesses: on
      Memory space accesses: off
      Bus mastering: off
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: on
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
    Status register: 0x0200
      Capability List support: off
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: off
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: communications (0x07)
    Subclass Name: serial (0x00)
    Interface: 0x02
    Revision ID: 0x00
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0x20
    Cache Line Size: 0x08

  Type 0 ("normal" device) header:
    0x10: 0x00000000 0x00003041 0x00003001 0x00003061
    0x20: 0x00000000 0x00000000 0x00000000 0x10411393
    0x30: 0x00000000 0x00000000 0x00000000 0x0000010b

    Base address register at 0x10
      not implemented(?)
    Base address register at 0x14
      type: i/o
      base: 0x00003040, not sized
    Base address register at 0x18
      type: i/o
      base: 0x00003000, not sized
    Base address register at 0x1c
      type: i/o
      base: 0x00003060, not sized
    Base address register at 0x20
      not implemented(?)
    Base address register at 0x24
      not implemented(?)
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x1393
    Subsystem ID: 0x1041
    Expansion ROM Base Address: 0x00000000
    Reserved @ 0x34: 0x00000000
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x0b

  Device-dependent header:
    0x40: 0x00000000 0x10411393 0x10411393 0x10411393
    0x50: 0x10411393 0x10411393 0x10411393 0x10411393
    0x60: 0x10411393 0x10411393 0x10411393 0x10411393
    0x70: 0x10411393 0x10411393 0x10411393 0x10411393
    0x80: 0x10411393 0x10411393 0x10411393 0x10411393
    0x90: 0x10411393 0x10411393 0x10411393 0x10411393
    0xa0: 0x10411393 0x10411393 0x10411393 0x10411393
    0xb0: 0x10411393 0x10411393 0x10411393 0x10411393
    0xc0: 0x10411393 0x10411393 0x10411393 0x10411393
    0xd0: 0x10411393 0x10411393 0x10411393 0x10411393
    0xe0: 0x10411393 0x10411393 0x10411393 0x10411393
    0xf0: 0x10411393 0x10411393 0x10411393 0x10411393


-- 
Olivier Cherrier - Symacx.com
mailto:oc@symacx.com