Subject: Re: lock-free data structures
To: Michael van Elst <mlelstv@serpens.de>
From: Ignatios Souvatzis <is@netbsd.org>
List: tech-kern
Date: 01/04/2006 13:56:18
On Wed, Jan 04, 2006 at 12:15:20PM +0000, Michael van Elst wrote:
> kpneal@pobox.com writes:
> 
> >> An immediate drawback is that not all architectures support the cmpxchg
> >> instruction. What are others? Is the possible performance gain negligible
> >> compared to the required effort of recoding a large volume of code?
> 
> >I think the Amiga documentation forbids use of the m68k CAS instruction...
> 
> The instructions like CAS are only necessary for shared data
> among multiple bus masters. For a single processor you can
> simply use read-modify-write instructions like BSET/BCLR.

Yes, but those are functionally like TAS.

I'm not aware of an atomic CAS equivalent.

As for CAS - isn't CAS only forbidden in CHIPMEM?

	-is
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