Subject: Re: access to external proms for PCI
To: Jason Thorpe <email@example.com>
From: David Laight <firstname.lastname@example.org>
Date: 12/18/2005 12:07:04
On Sat, Dec 17, 2005 at 04:02:45PM -0500, Allen Briggs wrote:
> Are the systems that have firmware initializing the bus at issue?
This is a bigger problem (even for cardbus) that it first appears.
In order to assign some bus space to card (for any purpose) all the
PCI bridges between the CPU and target must be configured to pass the
relevant address range through to the actual PCI bus containing the card.
Since PCI bridges (normally) only forward a single range (of each type)
of addresses to the subsiduary bus, bus space required to map card
resources must have been allocated when the PCI bridges were initialised.
Unfortunately when OPB/BIOS initialises a system they tend to allocate
the minimum of resource to each PCI bus. This makes it very difficult
to dynamically assign address space to cards for any purpose.
Typically there isn't even a reasonable amount of bus resource reserved
for use by cardbus cards that are not present at boot time.
If a cardbus card has a PCI bridge on it, you may well find that there
are no spare bus-numbers to be assigned to its target bus .
So you are unlikely (in general) to be able to find the 64k+ of address
space on the required bus.
Reworking the entire PCI bus resource allocation is also problematical,
trying to reset the BAR registers of some VGA cards will lock the system.
Also the BIOS may have cached addresses - and BIOS code does run....
 Look at the bus number assignments on the Tadpole Voyager and the
Tadpole/RDI ultrabook(?) both use (much) the same bus structure, but
have the two 33MHz busses swapped - so one of them (I've forgotten which)
has no bus numbers assignable to the cardbus slots.
David Laight: email@example.com