Subject: re: Concern about IPL levels and spinlocking
To: Bill Studenmund <firstname.lastname@example.org>
From: matthew green <email@example.com>
Date: 12/18/2005 22:59:28
But I found some spl levels swap relative ordering. For instance, on amd64
& i386, splipi > splhigh. On alpha and vax, though, splhigh < splipi. That
worries me, as if we ever write MI code that ends up depending on being
able to pass IPIs around, it'll fail on alpha & vax. And since splipl is
an MD definition (macppc and sparc don't seem to have it), MI code would
not directly see the problem. In fact, on vax, splipi < most other spl
splipi() is MD, thus it doesn't matter what it's definition is. i am
not sure we will ever have MI splipi() required functionality.... this
seems like a non-problem.
I'm really not sure what to do about this, but it'll be real hard to move
to a fine-grained spin locking on all MP architectures if MI code doesn't
have one hierarchy to code to.
since all levels/drivers need to be fixed, fixing one platforms highest
level first is not detrimental to other platforms. i'm not sure that this
is a real problem? eg, if sparc/sparc64 have to lag because of splaudio
vs. splsched, they will just have to keep the current biglock.
perhaps i'm missing something?