Subject: Re: PCI-Express question: standard offsets for PCI-e registers in PCI config-space?
To: None <>
From: Jonathan Stone <>
List: tech-kern
Date: 11/15/2005 11:40:32
In message <>,
Matthias Drochner writes:

> said:
>>   Capability register at 0x48
>>     type: 0x01 (Power Management, rev. 1.0)
>>   Capability register at 0x50
>>     type: 0x03 (VPD)
>>   Capability register at 0x58
>>     type: 0x05 (MSI)
>>   Capability register at 0xd0
>>     type: 0x10 (PCI Express) 
>The UNKNOWN0 adress (0xc4) doesn't appear to be part of
>a capability block, so it is a vendor specific thing.
>So it will stay a magic number for now.
>(unless OpenSolaris is of help)
>> They even accessed the PCIe capability block directly, when
>> I changed it to pci_get_capability().
>So what you could do here to make it look even nicer:
>in bge_attach:

>if (!pci_get_capability(pc, t, PCIEXPRESS, &sc->bge_pcie, NULL))
>	sc->bge_pcie = 0;
>in bge_reset:
>if (sc->bge_pcie) {
>	/* ... */
>	pci_conf_write(pa->pa_pc, pa->pa_tag, sc->bge_pcie + 8, 0xf5000);

Uhm. Can you suggest suitable, separate, #define names and values for
the "set payload" portion , hich I beleive is 0x5000 (values for other
sizes would be nice, is it log2) and the "reset error status", 0x000f << 16?

* Start with  Matthias' change as above;
* Add #defines for offsets 0x08 and 0x0a inside a PCI-e capability,
  to pcireg.h, and use them in if_bge.c;

* Rename bge_pcie to be bge_pcie_cap_offset, make sure its type is an
  int, add a comment noting that (due to non-express PCI) the
  bge_pcie_cap cannot be zero for a PCI-e device;

* Add a .. != 0) to any tests of bge_pcie_cap_offset (style:
  that softc field its no longer a boolean, its an offset);

and I think we'll be done. For now.