Subject: Re: PCI-Express question: standard offsets for PCI-e registers in PCI
To: Quentin Garnier <cube@cubidou.net>
From: Matthias Drochner <M.Drochner@fz-juelich.de>
List: tech-kern
Date: 11/15/2005 18:42:03
cube@cubidou.net said:
> Capability register at 0x48
> type: 0x01 (Power Management, rev. 1.0)
> Capability register at 0x50
> type: 0x03 (VPD)
> Capability register at 0x58
> type: 0x05 (MSI)
> Capability register at 0xd0
> type: 0x10 (PCI Express)
The UNKNOWN0 adress (0xc4) doesn't appear to be part of
a capability block, so it is a vendor specific thing.
So it will stay a magic number for now.
(unless OpenSolaris is of help)
> They even accessed the PCIe capability block directly, when
> I changed it to pci_get_capability().
So what you could do here to make it look even nicer:
in bge_attach:
if (!pci_get_capability(pc, t, PCIEXPRESS, &sc->bge_pcie, NULL))
sc->bge_pcie = 0;
in bge_reset:
if (sc->bge_pcie) {
/* ... */
pci_conf_write(pa->pa_pc, pa->pa_tag, sc->bge_pcie + 8, 0xf5000);
}
best regards
Matthias