Subject: Re: OHCI question...
To: Masao Uebayashi <email@example.com>
From: Garrett D'Amore <firstname.lastname@example.org>
Date: 10/27/2005 20:24:03
Masao Uebayashi wrote:
>Hi! We have a similar patch for MPC5200 in a local tree, where
>registers are big-endian.
Is it just the registers, or is it also the data structures in host
memory? If it is just the registers, then one can provide an alternate
My part is the Alchemy part, and the various OHCI data structures in
host memory are *also* big-endian (if the processor is in big-endian
mode), which is what causes the pain.
>>1) add logic to ohci.c to support run-time conditionalized byte
>>swapping. Probably via a function pointer in the softc, this would
>>work, but might be a little bit slower. (I'd conditionalize this
>>support via a new OHCI_NATIVE_ORDER or somesuch.)
>I'm in favor of this approach.
Thank-you. I'm interested to see what other folks think, too. If it is
generally agreed upon, then I'll submit a patch to do this.