Subject: Cardbus SATA3112 Driver development problems: HELP!!
To: None <>
From: Phil Quinton <>
List: tech-kern
Date: 10/26/2005 11:33:51
Hi guys...

 I'm having some problems with a driver I've bodges together, and my 
knowledge of PCI/CARDBUS/ and the wd driver are almost non-existent.. 

 OK. I've bodged the following files:

From				To
----				--
pci/pciide.c			cardbus/cardbuside.c
pci/pciide_common.c		cardbus/cardbuside_common.c
pci/pciidereg.h		cardbus/cardbuside_reg.h
pci/pciidevar.h		cardbus/cardbuside_var.h
pci/pciide_sii3112.h		cardbus/cardbuside_sii3122.h
pci/satalink.c		cardbus/if_satalink_cardbus.c

I've added the following lines to files.cardbus:

# CARDBUS/PCI IDE controllers
define cardbuside_common
file dev/cardbus/cardbuside_common.c cardbuside_common

device	cardbuside {[channel = -1]}: ata, cardbuside_common
attach	cardbuside at cardbus
file	dev/cardbus/cardbuside.c		cardbuside

# Silicon Image SATALink controllers
device  satalinkcb {[channel = -1]}: ata, cardbuside_common
attach  satalinkcb at cardbus with satalink_cardbus
file    dev/cardbus/if_satalink_cardbus.c              satalink_cardbus

OK... The Problem.

 It looks like it's working... detects the chip.. detects if there is a 
HD attached, can differentiate between which port on the card it's 
connected too... BUT when the wd driver gets it... it detects the HD as 
an ST506 (wd1: see below) with some seriously bogus values.. and the 
whole thing falls over.. Any suggestions would be greatly appreciated... 
also.. if someone could suggest the best way to debug this or have a 
look through the code I would be more than greatful...

Thanks in advance...


OUTPUT: Please note I've put a load of printf statements in... and 
debugging is enabled.

cardbus_attach_card: cb1 start
cardbus1 bhlc 0x00000000 -> cardbus_attach_card: Vendor 0x1095, Product 
0x3112, CIS 0x0
cardbus1 func0 bhlc 0x00000000 -> 0x0000f000
satalinkcb0 at cardbus1 dev 0 function 0entering 
cardbus_function_enable...  101

satalinkcb0: Silicon Image SATALink 3112 (rev. 0x01)
sii3112_chip_map entered
BA5 register space: enabled
cardbus_mapreg_map called: cardbus1 0
cardbus_mapreg_map: physaddr 40000000
BA5 register space: enabled
satalinkcb0: bus-master DMA support presentcardbuside_mapreg_dma: 
cardbus_mapreg_map called: cardbus1 1
cardbus_mapreg_map: physaddr 4300
cardbuside_mapreg_dma: sc->sc_dma_ok = 1
cardbuside_mapreg_dma: Setting up DMA for channels

satalinkcb0: primary channel wired to native-PCI mode
- cardbus_intr_establish: irq 9
satalinkcb0: using 9 for native-CARDBUS interrupt
cardbus_mapreg_map called: cardbus1 1
cardbus_mapreg_map: physaddr 4700
cardbus_mapreg_map called: cardbus1 1
cardbus_mapreg_map: physaddr 4b00
atabus1 at satalinkcb0 channel 0
satalinkcb0: secondary channel wired to native-PCI mode
cardbus_mapreg_map called: cardbus1 1
cardbus_mapreg_map: physaddr 4f00
cardbus_mapreg_map called: cardbus1 1
cardbus_mapreg_map: physaddr 5300
atabus2 at satalinkcb0 channel 1
sii3112_chip_map exiting
satalinkcb0: port 0: device present, speed: 1.5Gb/s
wd0 at atabus0 drive 0: <FUJITSU MHD2021AT>
wd0: drive supports 16-sector PIO transfers, LBA addressing
wd0: 2067 MB, 4200 cyl, 16 head, 63 sec, 512 bytes/sect x 4233600 
wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 2 (Ultra/33)
wd1 at atabus1 drive 0: <ST506>
wd1: drive supports 1-sector PIO transfers, chs addressing
wd1: 69632 KB, 1024 cyl, 8 head, 17 sec, 512 bytes/sect x 139264 sectors
wd1(satalinkcb0:0:0): using PIO mode 0
satalinkcb0:0:0: wait timed out
wd1d: device timeout reading fsbn 0 (wd1 bn 0; cn 0 tn 0 sn 0), retrying
satalinkcb0 channel 0: reset failed for drive 0

** Last two lines keeps repeating slowly **