Subject: Re: bus shims (Re: lack of pciide transfer alignment checking causes crash)
To: Manuel Bouyer <bouyer@antioche.lip6.fr>
From: Jachym Holecek <freza@liberouter.org>
List: tech-kern
Date: 06/30/2005 03:12:20
Hello,

> > IHMO this can't be solved with an additionnal layer, but with an extention
> > to the bus_dma interface to let know the MD bus_dma implementation the
> > constraints of the device.
> 
> I don't think adding constraints is enough, because not all of the
> memory involved in DMA is allocated according to those constraints:
> data may come from mbufs or even user pages.

You need to state the constraint any time you create a dmamap, that is
bus_dmamap_create and bus_dmamem_alloc. The constraint would be enforced
at bus_dmamap_load time, regardless of where does the memory come from.

> Which means that either:
> 
>  * each MD bus_dma implementation has to grow an internal bounce
>    capability that's invoked automatically under certain
>    constraint-matching failures, which means a complex interface (and
>    again runs into the issues mrg points out, which I had initially
>    misread as the entirety of his point).

bus_dma backends that have no better way would have to bounce at
bus_dmamap_load() time, yes. The interface doesn't really seem complex, the
driver does the same as it'd normally do, just adding a dmamap flag if it
detects broken chip. IIUC...

	Regards,
		-- Jachym Holecek