Subject: Re: lack of pciide transfer alignment checking causes crash
To: Richard Earnshaw <Richard.Earnshaw@buzzard.freeserve.co.uk>
From: Manuel Bouyer <bouyer@antioche.lip6.fr>
List: tech-kern
Date: 06/29/2005 09:56:08
On Tue, Jun 28, 2005 at 10:53:11PM +0100, Richard Earnshaw wrote:
> > Right now, bus_dma(9) because it only knows the limitations of the bus
> > (e.g. the 16MB limit for ISA, or 4GB limit for 32bit PCI).
> > The bus_dma interface would need to be extended to be able to specify
> > a range of allowed physical addresses. I think this information needs to
> > be passed to bus_dmamap_create() and bus_dmamem_alloc() (it's the same kind
> > of information as alignment and boundary).
> > If several devices need this, and it's not something limited to one or two
> > i386-only device, it probably make sense to extend bus_dma in this direction.
> > For platforms already using bounce buffer, it would not be hard to add this.
> > For platforms using an IOMMU, this should not be too difficult to add either.
> > As a temporary measure, other platforms could return EINVAL for out of range
> > requests (or maybe at bus_dmamap_create() time. bus_dmamem_alloc() is easier)
> > .
> 
> Some of the CPU boards that can be fitted to the ARM Integrator/AP 
> development boards have on-board memory that can't be used for DMA (it's 
> not mapped into the PCI address space).  This memory is at least 4 times 
> faster than the normal memory sticks that are available (twice the clock 
> frequency, twice the bus width), but currently I can't use this memory 
> with NetBSD because it doesn't do bounces properly.

But this is a platform issue, not a driver issue as what we're discussing
here. The ARM bus_dma implementation should be aware of this, and implement
proper bouncing.

-- 
Manuel Bouyer <bouyer@antioche.eu.org>
     NetBSD: 26 ans d'experience feront toujours la difference
--