Subject: Re: splx() optimization [was Re: SMP re-eetrancy in "bottom half" drivers]
To: YAMAMOTO Takashi <yamt@mwd.biglobe.ne.jp>
From: Bill Studenmund <wrstuden@netbsd.org>
List: tech-kern
Date: 06/06/2005 11:27:25
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On Mon, Jun 06, 2005 at 03:45:52PM +0900, YAMAMOTO Takashi wrote:
> > Or, to put that another way: given where NetBSD is today, how would
> > you propose to get from the current state, to a kernel with
> > fine-grained SMP synchronization?
>=20
> tackle the highest IPL first.
Just to make sure I understand this, your suggestion is to leave most IPLs=
=20
alone (taking big lock) and convert individual IPLs one at a time?
If we have the resources to do that, it probably is quicker.
However I think the big questions are 1) if we do this transition to=20
per-level locks, how much harder will it be to transition to full=20
locking afterwards? i.e. once we have the per-IPL locking Jonathan=20
suggested, will we be behind where we are now? I think not, but it's good=
=20
to know. 2) Do we have folks who want to do the transition to per-IPL=20
locking more than work on individual fixup? i.e. do we have developer=20
resources that are more available for the fixup than the per-IPL work?
As above, I think doing the per-IPL fixup will not make it harder to go to=
=20
true fine-grained locking later. It effectively may be a distraction, but=
=20
I don't think it's harder to turn a section from a big lock to=20
fine-grained than it is to turn it from a per-IPL lock to fine-grained. Am=
=20
I missing something?
Given that, if someone WANTS to do the per-IPL fixup, I'd say let them. We=
=20
will get some improvement now on SMP systems, and we won't loose anything.
Take care,
Bill
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