Subject: Re: SMP re-eetrancy in "bottom half" drivers
To: None <email@example.com>
From: YAMAMOTO Takashi <firstname.lastname@example.org>
Date: 05/18/2005 07:04:36
> i386 and amd64 are two very popular architectures which don't have
> ASIDs. Basedon prior experience, measurement of interrupt rates with
> current gig-e and early 10GbE NICS, and speaking just personally: I'd
> rule out that approach as a non-starter, at least as an MI solution.
> Unless, that is, one opts for something like run-to-completion to
> amortize the cost of the context-switch to an interrupt thread.
how ASIDs are related?
normally interrupt threads shouldn't need to switch address space for
i386 or amd64.