Subject: Re: Ehci/Umass bug ?
To: IWAMOTO Toshihiro <>
From: Vincent <>
List: tech-kern
Date: 11/24/2004 09:53:01
Konishiwa :)

> I had the same problem with ehci+umass on a 2.0_RC4 amd64 box, but not
> with ohci on another 1.6something box.  I guess this is a ehci bug.

I've tried to bypass the CSW test. In order to do that neatly, I have 
defined a new quirk and added a "shunt"-test in 'umass.c'. Same result. 
After a short while, one or two seconds, the device hangs, and no amount 
of BBB resets or bulk_clears helps.

I am wondering about split transactions or a lost interrupt cycle. Is 
there anyway to acertain any of these hypothesis ?