Subject: Re: kernel: alignment fault trap on sparc
To: Eduardo Horvath <eeh@NetBSD.org>
From: Manuel Bouyer <firstname.lastname@example.org>
Date: 06/11/2004 23:27:25
well, it turns out it was an hardware issue, and not the one I expected:
I though it would be CPU or cache, but I swapped the motherboard and symptoms
persisted. Now that I remplaced all the RAM, it seems stable again.
I also couldn't get the panic on a SS2 or SS1+.
Sorry for the noise, and thanks for the sparc course !
On Mon, Jun 07, 2004 at 09:10:13PM +0000, Eduardo Horvath wrote:
> The save insn could cause a trap. What save does is rotate the register
> windows. (Let's see how well my memory works. It's been a while since
> I dealt w/a V8 machine.) There is a Window Invalid Mask (WIM) in the PSR
The IPX has a V7 processor. But the V7 also has this register windows
mechanism, isn't it ?
Manuel Bouyer <email@example.com>
NetBSD: 26 ans d'experience feront toujours la difference