Subject: L1121 Compact Flash/PC Card Interface Chip
To: Jachym Holecek <freza@psi.cz>
From: Anand Lalgondar <solarflares@fastmail.fm>
List: tech-kern
Date: 02/04/2004 14:25:28
> > Now if I have to support a PCMCIA protocol which supports three address
> > space(attribute, memory and I/O each of 64MB) then I have create three
> > new tags to access the individual addresses. ??
> 
> Depends what your architecture looks like, bus space tags should represnt
> the CPU bus (as I understand it). Look at
> 
> 	sys/arch/arm/sa11x0/sa11xx_pcic.c
> 
> for an example - the StrongARM has only one bus space tag (since all
> I/O is memory mapped), so access to PCMCIA attr/mem/io is translated
> to access to well-defined physical memory areas.
> 
> 	Hope this helps,
Yes, Thank you for the same.

As I am working on supporting PCMCIA on TX4925, I would like to get some
information about the hardware that supports PCMCIA in the above
mentioned strongarm processor if possible. Could you please provide the
same. 

Regarding the PCMCIA hardware in the TX4925 it is supported on a channel
of an EBUS controller. It supports two registers, command regsiter
(EBCCR)) and a base address register (EBBAR). In the EBBAR a physical
address should be specified to map the memory of of PC Card connected.
Now in this case I don't know how the attribute, common and I/O memory
could be differentiated by a single offset. I think this should be
managed by the driver, but I am looking for an example how it is done. ??
 Next the EBCCR supports configuration of the following:
1. Type of memory being accessed (3-bits are provided - 8 combinations
but only four used) - attr OR mem OR I/O OR disable.
2. Bus width to access the PCMCIA - 8-bit or 16-bit
3. The slot to enable - this supports two slots.
4. The remaining bits contains some page mode, and timing related bits.

Next is to connecte to the slot the glue logic is required to handle the
interrupt and the voltage level translation - L1121 Compact Flash/PC Card
Interface Chip.

So it something like:

              Address/Data/Control Signals 
         |-------------------------------------|
CPU <-> EBUC <-> L1121 <-> PCMCIA socket <-> PC Card. 
                   |---------------------------|
                       IRQ and Voltage levels.

Hope to get some information.

 - Anand

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