On Wed, 4 Feb 2004, Simon Burge wrote:

> Frederick Bruckman wrote:
>
> > On Wed, 4 Feb 2004, Simon Burge wrote:
> >
> > > Looks ok at a glance.  My only question is why the pcireg_t
> > > variables need to be volatile in write_siig10x_usrreg() and
> > > write_siig20x_usrreg()?
> >
> > Originally, I tried to use bus_space_barrier(...,
> > BUS_SPACE_BARRIER_READ_BEFORE_WRITE) before pci_conf_write()

> pci_conf_read/write don't need any barriers.

> You can't use a PCI chipset tag where you need a bus space tag.  How
> were you calling bus_space_barrier()?

I don't remember now, but I'm sure I was confused. I'll take the
volatile out.

Frederick