On Wed, 4 Feb 2004, Simon Burge wrote:

> Frederick Bruckman wrote:
>
> > I posted patches a couple of weeks ago to enable high-speed mode
> > (greater than 115200 bps) on the Cyberserial PCI serial and combo
> > cards.
> >
> > This is considerably simpler than my earlier attempt: all the
> > high-speed clocks are enabled at attachment, so the com stuff doesn't
> > even need to know about it. This seems to work fine from 300 bps to
> > 230400 bps. (I can't easily test the 921600 bps speed.)
> >
> >   ftp://ftp.netbsd.org/pub/NetBSD/misc/fredb/cyberserial.diff

> Looks ok at a glance.  My only question is why the pcireg_t
> variables need to be volatile in write_siig10x_usrreg() and
> write_siig20x_usrreg()?

Originally, I tried to use bus_space_barrier(...,
BUS_SPACE_BARRIER_READ_BEFORE_WRITE) before pci_conf_write() [*].
My thinking was, that the compiler would see the registers as being
set by pci_conf_read(), whereas you might rather think of them as
being set by bus_space_barrier(), as a side-effect; ergo "volatile".

I suppose I should either put the bus_space_barrier() back, even with
the obsolete macros, or take out the volatile.

[*] That didn't even compile. Is the bus_space(9) man page leading
the implementation?

Frederick