Subject: Re: Changing the BAR of a PCI device at driver load time
To: David Laight <david@l8s.co.uk>
From: Nathan J. Williams <nathanw@wasabisystems.com>
List: tech-kern
Date: 09/09/2003 13:33:27
David Laight <david@l8s.co.uk> writes:

> More specifically each PCI bridge will only forward a single range
> of addresses to each subordinate bus [1].  This means that you have to
> allocate memory and io space (and bus numbers) to each bus during the
> initial grope.

Well, two - memory-mapped IO and prefetchable memory are separate -
but your point that it's all prearranged by the BIOS stands.

> Plug a PCI extender into a cardbus slot and you start wishing the bios
> had allocated it a lot more addresses.  This is a particular problem
> on systems which have multiple PCI busses (eg 2*33MHZ off a 66MHz master).

Yup. Needing to reserve downstream space for cardbus or other hot-plug
PCI interfaces is a definite quality-of-implementation issue.

        - Nathan