Subject: Re: Changing the BAR of a PCI device at driver load time
To: Nathan J. Williams <nathanw@wasabisystems.com>
From: Vincent <10.50@free.fr>
List: tech-kern
Date: 09/09/2003 10:35:38
Nathan :

> PCI-to-PCI bridges divide up the memory with 1-MB granularity. If the
> AGP bridge grabs the 0x803xxxxx range for that bus, then that address
> range isn't usable on other buses.

Hmm.
To be more specific, the VGA chipset claims address range 0x80380000 for
access to its registers. The AGP memory aperture is somewhat higher
(0xA0000000), but I think that does not matter. It confirms what I
thought : you can't have two devices on two separate PCI buses within a
single megabyte range.

> If you run "pcictl /dev/pci0 list" and look for the PCI-PCI or PCI-AGP
> bridges, you can dun "pcictl ... dump" on each of them to see the I/O
> and memory ranges that they are programmed with.
 
> Overall, it sounds like the BIOS is either programming the PCI ranges
> improperly, or expects the OS to take care of it. Do you have a BIOS
> option for "Plug and Play OS"? Does your kernel have any of the
> PCIBIOS options (PCIBIOS, PCIBIOS_ADDR_FIXUP, etc)?

No BIOS options for Plug and Play I am aware of.

I use the PCIBIOS (I must, since one device and one interrupt are
erronously configured), but PCIBIOS_ADDR_FIXUP does not detect that
particular problem.

I'll try the commands you told me, as soon as I have a working system. I
fell (because I didn't read what was going on on current) into the new
kernel trap (I have problems with the libc).

I'll tell you, though.

Thanks again, have a nice day !
Vincent