At Fri, 15 Aug 2003 23:36:59 +0100, Richard Earnshaw wrote:
> > Actually, BUS_DMA_COHERENT involves memory as seen by CPU and devices.
> > 
> > With BUS_DMA_COHERENT, devices and the CPU must have a coherent view
> > of memory.
> 
> Which implies that coherrency is impossible if bounce buffers are needed.

Yes, as currently specified, I think so.

I'm not sure if that's a *problem* for things (i.e., shared, pooled
data structures) addressed by BUS_DMA_COHERENT...



cgd