Hello,

> It depends on the architecture.  PowerPC is difficult to protect due to
> the need for exception code from 0x0100-0x2fff.  Most others do the right
> thing.

That's a weak excuse for PPC - I fixed this for a commercial (embedded)
operating system, and in fact it is very simple to make the exception handler
region totally inaccessible outside of the initial handling code on PowerPC.
That initial code must jump out of the lower pages, store critical registers
and then get the MMU back on (it was disabled automatically by the CPU when the
exception occurred for those not familiar with PPC).

Now, ARM is a different matter - on that one the best we managed was read-only.
If anybody knows how to make ARM's zero page inaccessible, I'd sure be
interested to hear it.

TTFN,
John...


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