Subject: Re: IST_LEVEL in arch/mips
To: None <cgd@broadcom.com>
From: Herb Peyerl <hpeyerl@beer.org>
List: tech-kern
Date: 03/12/2003 16:06:15
cgd@broadcom.com  wrote:
 > hmm, is that a built-in device?  will the "interrupt line" ever be
 > used for anything else?  if not, it might be The Right Thing to simply
 > bury the knowledge in the intr controller code.

yes and no, as answers to the questions.

 > (generally, other interrupts are active high?)

yes, except for the completely configurable GPIO pins.

 > > So I propose (as per suggestion of Christos):
 > >  
 > > -  Add the following:
 > >         #define IST_HIGH        0       /* active high */
 > >         #define IST_LOW         0x1000  /* active low */
 > 
 > I would suggest, if you're going to do this, that they be independent
 > modifiers.
 > 
 > i.e., neither means "whatever is normal for this ICU", and if you
 > specify one then that's explicitly what the ICU code tries to enable
 > (and rejects if it can't).

Jason's suggestion was just to do: 
	#define IST_NONE        0       /* none (dummy) */
	#define IST_PULSE       1       /* pulsed */
	#define IST_EDGE        2       /* edge-triggered */
	#define IST_LEVEL       3       /* level-triggered */
	#define IST_LEVEL_LOW   4	/* level triggered, active low */
	#define IST_LEVEL_HIGH  5	/* level triggered, active high */

and then just deal with it in the intr code.